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From: Jordan Crouse <jcrouse@codeaurora.org>
To: Rob Clark <robdclark@gmail.com>
Cc: dri-devel@lists.freedesktop.org,
	Rob Clark <robdclark@chromium.org>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU" 
	<freedreno@lists.freedesktop.org>,
	Jonathan Marek <jonathan@marek.ca>,
	David Airlie <airlied@linux.ie>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU" 
	<linux-arm-msm@vger.kernel.org>,
	Sharat Masetty <smasetty@codeaurora.org>,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	Eric Anholt <eric@anholt.net>,
	Ben Dooks <ben.dooks@codethink.co.uk>,
	Daniel Vetter <daniel@ffwll.ch>,
	AngeloGioacchino Del Regno <kholk11@gmail.com>,
	Sean Paul <sean@poorly.run>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [Freedreno] [PATCH 2/2] drm/msm/adreno: un-open-code some packets
Date: Fri, 10 Jul 2020 12:03:04 -0600	[thread overview]
Message-ID: <20200710180304.GG21059@jcrouse1-lnx.qualcomm.com> (raw)
In-Reply-To: <20200707203529.2098979-3-robdclark@gmail.com>

On Tue, Jul 07, 2020 at 01:35:00PM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>

Might need a commit log here, but otherwise makes sense.

Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>

> Signed-off-by: Rob Clark <robdclark@chromium.org>
> ---
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c |  5 +++--
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++++++----
>  2 files changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index d95970a73fb4..7f4526b3283d 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -186,7 +186,8 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
>  	 * timestamp is written to the memory and then triggers the interrupt
>  	 */
>  	OUT_PKT7(ring, CP_EVENT_WRITE, 4);
> -	OUT_RING(ring, CACHE_FLUSH_TS | (1 << 31));
> +	OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(CACHE_FLUSH_TS) |
> +		CP_EVENT_WRITE_0_IRQ);
>  	OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));
>  	OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));
>  	OUT_RING(ring, submit->seqno);
> @@ -730,7 +731,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
>  	 */
>  	if (adreno_is_a530(adreno_gpu)) {
>  		OUT_PKT7(gpu->rb[0], CP_EVENT_WRITE, 1);
> -		OUT_RING(gpu->rb[0], 0x0F);
> +		OUT_RING(gpu->rb[0], CP_EVENT_WRITE_0_EVENT(STAT_EVENT));
>  
>  		gpu->funcs->flush(gpu, gpu->rb[0]);
>  		if (!a5xx_idle(gpu, gpu->rb[0]))
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index 7768557cdfb2..1ed325bea430 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -74,7 +74,9 @@ static void get_stats_counter(struct msm_ringbuffer *ring, u32 counter,
>  		u64 iova)
>  {
>  	OUT_PKT7(ring, CP_REG_TO_MEM, 3);
> -	OUT_RING(ring, counter | (1 << 30) | (2 << 18));
> +	OUT_RING(ring, CP_REG_TO_MEM_0_REG(counter) |
> +		CP_REG_TO_MEM_0_CNT(2) |
> +		CP_REG_TO_MEM_0_64B);
>  	OUT_RING(ring, lower_32_bits(iova));
>  	OUT_RING(ring, upper_32_bits(iova));
>  }
> @@ -102,10 +104,10 @@ static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
>  
>  	/* Invalidate CCU depth and color */
>  	OUT_PKT7(ring, CP_EVENT_WRITE, 1);
> -	OUT_RING(ring, PC_CCU_INVALIDATE_DEPTH);
> +	OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(PC_CCU_INVALIDATE_DEPTH));
>  
>  	OUT_PKT7(ring, CP_EVENT_WRITE, 1);
> -	OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
> +	OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(PC_CCU_INVALIDATE_COLOR));
>  
>  	/* Submit the commands */
>  	for (i = 0; i < submit->nr_cmds; i++) {
> @@ -139,7 +141,8 @@ static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
>  	 * timestamp is written to the memory and then triggers the interrupt
>  	 */
>  	OUT_PKT7(ring, CP_EVENT_WRITE, 4);
> -	OUT_RING(ring, CACHE_FLUSH_TS | (1 << 31));
> +	OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(CACHE_FLUSH_TS) |
> +		CP_EVENT_WRITE_0_IRQ);
>  	OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));
>  	OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));
>  	OUT_RING(ring, submit->seqno);
> -- 
> 2.26.2
> 
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

      reply	other threads:[~2020-07-10 18:03 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-07 20:34 [PATCH 0/2] drm/msm/adreno: cleanup some packet building Rob Clark
2020-07-07 20:34 ` [PATCH 1/2] drm/msm: sync generated headers Rob Clark
2020-07-10 18:02   ` Jordan Crouse
2020-07-11 11:48   ` Linus Walleij
2020-07-11 14:49     ` Rob Clark
2020-07-07 20:35 ` [PATCH 2/2] drm/msm/adreno: un-open-code some packets Rob Clark
2020-07-10 18:03   ` Jordan Crouse [this message]

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