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Wed, 5 Aug 2020 06:37:59 +0000 From: Shengjiu Wang To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/3] ASoC: fsl_sai: Drop TMR/RMR settings for synchronous mode Date: Wed, 5 Aug 2020 14:34:12 +0800 Message-Id: <20200805063413.4610-3-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200805063413.4610-1-shengjiu.wang@nxp.com> References: <20200805063413.4610-1-shengjiu.wang@nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SG2PR03CA0109.apcprd03.prod.outlook.com (2603:1096:4:91::13) To VI1PR0402MB3342.eurprd04.prod.outlook.com (2603:10a6:803:11::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from audiosh1.ap.freescale.net (119.31.174.67) by SG2PR03CA0109.apcprd03.prod.outlook.com (2603:1096:4:91::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3261.12 via Frontend Transport; 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Rx synchronous with Tx: The TMR is the word mask register, it is used to mask any word in the frame, it is not relating to clock generation, So it is no need to be changed when Rx is going to be enabled. Signed-off-by: Shengjiu Wang Reviewed-by: Nicolin Chen --- sound/soc/fsl/fsl_sai.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 566c4747362a..334090d581ae 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -488,8 +488,7 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, /* * For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will * generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4), - * RCR5(TCR5) and RMR(TMR) for playback(capture), or there will be sync - * error. + * RCR5(TCR5) for playback(capture), or there will be sync error. */ if (!sai->is_slave_mode) { @@ -500,8 +499,6 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(sai->regmap, FSL_SAI_TCR5(ofs), FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK | FSL_SAI_CR5_FBT_MASK, val_cr5); - regmap_write(sai->regmap, FSL_SAI_TMR, - ~0UL - ((1 << channels) - 1)); } else if (!sai->synchronous[RX] && sai->synchronous[TX] && tx) { regmap_update_bits(sai->regmap, FSL_SAI_RCR4(ofs), FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK, @@ -509,8 +506,6 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(sai->regmap, FSL_SAI_RCR5(ofs), FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK | FSL_SAI_CR5_FBT_MASK, val_cr5); - regmap_write(sai->regmap, FSL_SAI_RMR, - ~0UL - ((1 << channels) - 1)); } } -- 2.27.0