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Rao" , Kemeng Shi , James Clark , Wei Li , Al Grant , Will Deacon , Mathieu Poirier , Mike Leach , linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v2 07/14] perf mem: Support Arm SPE events Date: Tue, 1 Sep 2020 09:38:08 +0100 Message-Id: <20200901083815.13755-8-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200901083815.13755-1-leo.yan@linaro.org> References: <20200901083815.13755-1-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch is to add Arm SPE events for perf memory profiling. It supports three Arm SPE events: - spe-load: memory event for only recording memory load ops; - spe-store: memory event for only recording memory store ops; - spe-ldst: memory event for recording memory load and store ops. Signed-off-by: Leo Yan --- tools/perf/arch/arm64/util/Build | 2 +- tools/perf/arch/arm64/util/mem-events.c | 46 +++++++++++++++++++++++++ 2 files changed, 47 insertions(+), 1 deletion(-) create mode 100644 tools/perf/arch/arm64/util/mem-events.c diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/Build index 77f4d7b30932..df6c3d9ebaa6 100644 --- a/tools/perf/arch/arm64/util/Build +++ b/tools/perf/arch/arm64/util/Build @@ -9,4 +9,4 @@ perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o perf-$(CONFIG_AUXTRACE) += ../../arm/util/pmu.o \ ../../arm/util/auxtrace.o \ ../../arm/util/cs-etm.o \ - arm-spe.o + arm-spe.o mem-events.o diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm64/util/mem-events.c new file mode 100644 index 000000000000..f23128db54fb --- /dev/null +++ b/tools/perf/arch/arm64/util/mem-events.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "map_symbol.h" +#include "mem-events.h" + +#define E(t, n, s) { .tag = t, .name = n, .sysfs_name = s } + +static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = { + E("spe-load", "arm_spe_0/ts_enable=1,load_filter=1,store_filter=0,min_latency=%u/", "arm_spe_0"), + E("spe-store", "arm_spe_0/ts_enable=1,load_filter=0,store_filter=1/", "arm_spe_0"), + E("spe-ldst", "arm_spe_0/ts_enable=1,load_filter=1,store_filter=1,min_latency=%u/", "arm_spe_0"), +}; + +static char mem_ld_name[100]; +static char mem_st_name[100]; +static char mem_ldst_name[100]; + +struct perf_mem_event *perf_mem_events__ptr(int i) +{ + if (i >= PERF_MEM_EVENTS__MAX) + return NULL; + + return &perf_mem_events[i]; +} + +char *perf_mem_events__name(int i) +{ + struct perf_mem_event *e = perf_mem_events__ptr(i); + + if (i >= PERF_MEM_EVENTS__MAX) + return NULL; + + if (i == PERF_MEM_EVENTS__LOAD) { + scnprintf(mem_ld_name, sizeof(mem_ld_name), + e->name, perf_mem_events__loads_ldlat); + return mem_ld_name; + } + + if (i == PERF_MEM_EVENTS__STORE) { + scnprintf(mem_st_name, sizeof(mem_st_name), e->name); + return mem_st_name; + } + + scnprintf(mem_ldst_name, sizeof(mem_ldst_name), + e->name, perf_mem_events__loads_ldlat); + return mem_ldst_name; +} -- 2.20.1