From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D089DC433E2 for ; Thu, 3 Sep 2020 17:14:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A328020775 for ; Thu, 3 Sep 2020 17:14:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="efktdWwa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729095AbgICROU (ORCPT ); Thu, 3 Sep 2020 13:14:20 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:57026 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729033AbgICROD (ORCPT ); Thu, 3 Sep 2020 13:14:03 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 083HDraR090946; Thu, 3 Sep 2020 12:13:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1599153233; bh=rSnQj8ahflNauruLYYBd5GgP0QJfyShBBFBuutX+fWM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=efktdWwawY0w8wINQheaZBlDtImKpRwvk8hPA2TaKrO84vw8U2gLtPsWVRo4TKFPV Caw0vLaW1q9CkXdZMceXHfGXQNHg3TWX2plKCMz7CMsoz3KYquA4G6AbCOu5eD0wXC byYc8vy0tpHw6IfrkVfvKEAIx5D+LCYYTicFFaQw= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 083HDrqR095379; Thu, 3 Sep 2020 12:13:53 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 3 Sep 2020 12:13:53 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 3 Sep 2020 12:13:53 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 083HDDQ7088669; Thu, 3 Sep 2020 12:13:50 -0500 From: Pratyush Yadav To: Tudor Ambarus , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , "open list:SPI NOR SUBSYSTEM" , open list CC: Pratyush Yadav , Sekhar Nori , Boris Brezillon Subject: [PATCH v12 12/14] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Date: Thu, 3 Sep 2020 22:43:11 +0530 Message-ID: <20200903171313.18741-13-p.yadav@ti.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200903171313.18741-1-p.yadav@ti.com> References: <20200903171313.18741-1-p.yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Flashes might want to add a custom setup hook to configure the flash in the proper mode for operation. But after that, they would still want to run the default setup hook because it selects the read, program, and erase operations. Since there is little point in repeating all that code, expose the spi_nor_default_setup() in core.h to manufacturer-specific files. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 4 ++-- drivers/mtd/spi-nor/core.h | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 91dd8394a5ca..7f3ac20abe3e 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2742,8 +2742,8 @@ static int spi_nor_select_erase(struct spi_nor *nor) return 0; } -static int spi_nor_default_setup(struct spi_nor *nor, - const struct spi_nor_hwcaps *hwcaps) +int spi_nor_default_setup(struct spi_nor *nor, + const struct spi_nor_hwcaps *hwcaps) { struct spi_nor_flash_parameter *params = nor->params; u32 ignored_mask, shared_mask; diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index ec54ce6c5403..24cff27c51aa 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -453,6 +453,9 @@ int spi_nor_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_bfpt *bfpt, struct spi_nor_flash_parameter *params); +int spi_nor_default_setup(struct spi_nor *nor, + const struct spi_nor_hwcaps *hwcaps); + static struct spi_nor __maybe_unused *mtd_to_spi_nor(struct mtd_info *mtd) { return mtd->priv; -- 2.25.0