From: Martin Cerveny <m.cerveny@computer.org>
To: Maxime Ripard <mripard@kernel.org>
Cc: Martin Cerveny <m.cerveny@computer.org>,
"David S. Miller" <davem@davemloft.net>,
devicetree@vger.kernel.org,
Herbert Xu <herbert@gondor.apana.org.au>,
linux-arm-kernel@lists.infradead.org,
linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>
Subject: [PATCH v3 2/2] ARM: dts: sun8i: v3s: Enable crypto engine
Date: Mon, 7 Sep 2020 18:24:58 +0200 [thread overview]
Message-ID: <20200907162458.23730-3-m.cerveny@computer.org> (raw)
In-Reply-To: <20200907162458.23730-1-m.cerveny@computer.org>
V3s contains crypto engine that is compatible with A33.
Add device tree node.
Signed-off-by: Martin Cerveny <m.cerveny@computer.org>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index e5312869c0d2..6eb9c39aa93f 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -234,6 +234,17 @@
#size-cells = <0>;
};
+ crypto@1c15000 {
+ compatible = "allwinner,sun8i-v3s-crypto",
+ "allwinner,sun8i-a33-crypto";
+ reg = <0x01c15000 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
+ clock-names = "ahb", "mod";
+ resets = <&ccu RST_BUS_CE>;
+ reset-names = "ahb";
+ };
+
usb_otg: usb@1c19000 {
compatible = "allwinner,sun8i-h3-musb";
reg = <0x01c19000 0x0400>;
--
2.17.1
next prev parent reply other threads:[~2020-09-07 16:26 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-07 16:24 [PATCH v3 0/2] " Martin Cerveny
2020-09-07 16:24 ` [PATCH v3 1/2] dt-bindings: crypto: Add compatible for V3s Martin Cerveny
2020-09-07 16:24 ` Martin Cerveny [this message]
2020-09-08 6:20 ` [PATCH v3 0/2] ARM: dts: sun8i: v3s: Enable crypto engine Maxime Ripard
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