From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E1C7C43461 for ; Thu, 10 Sep 2020 17:29:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 56FAC208E4 for ; Thu, 10 Sep 2020 17:29:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727818AbgIJR3K (ORCPT ); Thu, 10 Sep 2020 13:29:10 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:54570 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727775AbgIJR2k (ORCPT ); Thu, 10 Sep 2020 13:28:40 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 3C01029BB05 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: Collabora Kernel ML , fparent@baylibre.com, matthias.bgg@gmail.com, drinkcat@chromium.org, hsinyi@chromium.org, weiyi.lu@mediatek.com, Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 00/12] soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller Date: Thu, 10 Sep 2020 19:28:14 +0200 Message-Id: <20200910172826.3074357-1-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dear all, This is a new driver with the aim to deprecate the mtk-scpsys driver. The problem with that driver is that, in order to support more Mediatek SoCs you need to add some logic to handle properly the power-up sequence of newer Mediatek SoCs, doesn't handle parent-child power domains and need to hardcode all the clocks in the driver itself. The result is that the driver is getting bigger and bigger every time a new SoC needs to be supported. All this information can be getted from a properly defined binding, so can be cleaner and smaller, hence, we implemented a new driver. For now, only MT8173 and MT8183 is supported but should be fairly easy to add support for new SoCs. Best regards, Enric Enric Balletbo i Serra (4): dt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller soc: mediatek: Add MediaTek SCPSYS power domains arm64: dts: mediatek: Add mt8173 power domain controller dt-bindings: power: Add MT8183 power domains Matthias Brugger (8): soc: mediatek: pm-domains: Add bus protection protocol soc: mediatek: pm_domains: Make bus protection generic soc: mediatek: pm-domains: Add SMI block as bus protection block soc: mediatek: pm-domains: Add extra sram control soc: mediatek: pm-domains: Add subsystem clocks soc: mediatek: pm-domains: Allow bus protection to ignore clear ack soc: mediatek: pm-domains: Add support for mt8183 arm64: dts: mediatek: Add mt8183 power domains controller .../power/mediatek,power-controller.yaml | 173 ++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 78 +- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 160 +++ drivers/soc/mediatek/Kconfig | 13 + drivers/soc/mediatek/Makefile | 1 + drivers/soc/mediatek/mtk-infracfg.c | 5 - drivers/soc/mediatek/mtk-pm-domains.c | 952 ++++++++++++++++++ include/dt-bindings/power/mt8183-power.h | 26 + include/linux/soc/mediatek/infracfg.h | 39 + 9 files changed, 1433 insertions(+), 14 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/mediatek,power-controller.yaml create mode 100644 drivers/soc/mediatek/mtk-pm-domains.c create mode 100644 include/dt-bindings/power/mt8183-power.h -- 2.28.0