From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAA6BC433E2 for ; Sat, 12 Sep 2020 11:47:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AF2B3214D8 for ; Sat, 12 Sep 2020 11:47:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725934AbgILLra (ORCPT ); Sat, 12 Sep 2020 07:47:30 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:12240 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725885AbgILLqJ (ORCPT ); Sat, 12 Sep 2020 07:46:09 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 3B5DF83C78525F93F05F; Sat, 12 Sep 2020 19:46:02 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.487.0; Sat, 12 Sep 2020 19:45:56 +0800 From: Zhen Lei To: Daniel Lezcano , Thomas Gleixner , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang , Jianguo Chen Subject: [PATCH v2 9/9] dt-bindings: sp804: add support for Hisilicon sp804 timer Date: Sat, 12 Sep 2020 19:45:36 +0800 Message-ID: <20200912114536.2910-10-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200912114536.2910-1-thunder.leizhen@huawei.com> References: <20200912114536.2910-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some Hisilicon SoCs, such as Hi1212, use the Hisilicon extended sp804 timer. Signed-off-by: Zhen Lei --- Documentation/devicetree/bindings/timer/arm,sp804.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt b/Documentation/devicetree/bindings/timer/arm,sp804.txt index 5cd8eee74af1..01a5451d33f2 100644 --- a/Documentation/devicetree/bindings/timer/arm,sp804.txt +++ b/Documentation/devicetree/bindings/timer/arm,sp804.txt @@ -3,6 +3,8 @@ ARM sp804 Dual Timers Required properties: - compatible: Should be "arm,sp804" & "arm,primecell" + or "hisilicon,sp804" & "arm,primecell" for some Hisilicon SoCs, + such as Hi1212. - interrupts: Should contain the list of Dual Timer interrupts. This is the interrupt for timer 1 and timer 2. In the case of a single entry, it is the combined interrupt or if "arm,sp804-has-irq" is present that -- 2.26.0.106.g9fadedd