From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1E1AC43461 for ; Sat, 12 Sep 2020 11:47:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A545E21531 for ; Sat, 12 Sep 2020 11:47:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725845AbgILLrT (ORCPT ); Sat, 12 Sep 2020 07:47:19 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:58970 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725888AbgILLqK (ORCPT ); Sat, 12 Sep 2020 07:46:10 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 1CE27FAC3F5626CEFE86; Sat, 12 Sep 2020 19:46:02 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.487.0; Sat, 12 Sep 2020 19:45:53 +0800 From: Zhen Lei To: Daniel Lezcano , Thomas Gleixner , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang , Jianguo Chen Subject: [PATCH v2 5/9] clocksource: sp804: prepare for support non-standard register offset Date: Sat, 12 Sep 2020 19:45:32 +0800 Message-ID: <20200912114536.2910-6-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200912114536.2910-1-thunder.leizhen@huawei.com> References: <20200912114536.2910-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add two local variables: timer1_base and timer2_base in sp804_of_init(), to avoid repeatedly calculate the base address of timer2, and make it easier to recognize timer1. Hope to make the next patch looks more clear. No functional change. Signed-off-by: Zhen Lei --- drivers/clocksource/timer-sp804.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c index a443f392a8e7..471c5c6aaf51 100644 --- a/drivers/clocksource/timer-sp804.c +++ b/drivers/clocksource/timer-sp804.c @@ -188,6 +188,8 @@ static int __init sp804_of_init(struct device_node *np) { static bool initialized = false; void __iomem *base; + void __iomem *timer1_base; + void __iomem *timer2_base; int irq, ret = -EINVAL; u32 irq_num = 0; struct clk *clk1, *clk2; @@ -197,9 +199,12 @@ static int __init sp804_of_init(struct device_node *np) if (!base) return -ENXIO; + timer1_base = base; + timer2_base = base + TIMER_2_BASE; + /* Ensure timers are disabled */ - writel(0, base + TIMER_CTRL); - writel(0, base + TIMER_2_BASE + TIMER_CTRL); + writel(0, timer1_base + TIMER_CTRL); + writel(0, timer2_base + TIMER_CTRL); if (initialized || !of_device_is_available(np)) { ret = -EINVAL; @@ -228,21 +233,21 @@ static int __init sp804_of_init(struct device_node *np) of_property_read_u32(np, "arm,sp804-has-irq", &irq_num); if (irq_num == 2) { - ret = sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name); + ret = sp804_clockevents_init(timer2_base, irq, clk2, name); if (ret) goto err; - ret = sp804_clocksource_and_sched_clock_init(base, + ret = sp804_clocksource_and_sched_clock_init(timer1_base, name, clk1, 1); if (ret) goto err; } else { - ret = sp804_clockevents_init(base, irq, clk1, name); + ret = sp804_clockevents_init(timer1_base, irq, clk1, name); if (ret) goto err; - ret = sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE, + ret = sp804_clocksource_and_sched_clock_init(timer2_base, name, clk2, 1); if (ret) goto err; -- 2.26.0.106.g9fadedd