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[82.236.8.43]) by smtp.gmail.com with ESMTPSA id m3sm33275243wrs.83.2020.09.16.08.01.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Sep 2020 08:01:51 -0700 (PDT) From: Neil Armstrong To: robh@kernel.org, tomeu.vizoso@collabora.com, steven.price@arm.com, alyssa.rosenzweig@collabora.com Cc: dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, Neil Armstrong Subject: [PATCH v2 0/3] drm/panfrost: add Amlogic integration quirks Date: Wed, 16 Sep 2020 17:01:44 +0200 Message-Id: <20200916150147.25753-1-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The T820, G31 & G52 GPUs integrated by Amlogic in the respective GXM, G12A/SM1 & G12B SoCs needs a quirk in the PWR registers at the GPU reset time. This serie adds the necessary quirks for the Amlogic integrated GPUs only. Changes since v1 at [1]: - removed the BROKEN_SH quirk after [2] was sent by robin - rebased on top of [3] by steven and moved the vendor quirk in the proper quirk function - added PWR_KEY unlock definition, and cleaned definition [1] https://lkml.kernel.org/r/20200908151853.4837-1-narmstrong@baylibre.com [2] https://lkml.kernel.org/r/cover.1600213517.git.robin.murphy@arm.com [3] https://lkml.kernel.org/r/20200909122957.51667-1-steven.price@arm.com Neil Armstrong (3): drm/panfrost: add support for vendor quirk drm/panfrost: add amlogic reset quirk callback drm/panfrost: add Amlogic GPU integration quirks drivers/gpu/drm/panfrost/panfrost_device.h | 3 +++ drivers/gpu/drm/panfrost/panfrost_drv.c | 11 +++++++++++ drivers/gpu/drm/panfrost/panfrost_gpu.c | 15 +++++++++++++++ drivers/gpu/drm/panfrost/panfrost_gpu.h | 2 ++ drivers/gpu/drm/panfrost/panfrost_regs.h | 4 ++++ 5 files changed, 35 insertions(+) -- 2.22.0