From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65AD5C43465 for ; Mon, 21 Sep 2020 08:02:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3CEE4214F1 for ; Mon, 21 Sep 2020 08:02:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726685AbgIUICW (ORCPT ); Mon, 21 Sep 2020 04:02:22 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:13783 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726402AbgIUICN (ORCPT ); Mon, 21 Sep 2020 04:02:13 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 521C1F4E9771BEDF25CD; Mon, 21 Sep 2020 16:02:11 +0800 (CST) Received: from huawei.com (10.175.113.32) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Mon, 21 Sep 2020 16:02:00 +0800 From: Liu Shixin To: Michael Turquette , Stephen Boyd , Matthias Brugger CC: , , , , "Liu Shixin" Subject: [PATCH -next] clk: mediatek: mt6797: simplify the return expression of mtk_infrasys_init Date: Mon, 21 Sep 2020 16:24:25 +0800 Message-ID: <20200921082425.2590990-1-liushixin2@huawei.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.175.113.32] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Simplify the return expression. Signed-off-by: Liu Shixin --- drivers/clk/mediatek/clk-mt6797.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt6797.c b/drivers/clk/mediatek/clk-mt6797.c index f35389a11af1..428eb24ffec5 100644 --- a/drivers/clk/mediatek/clk-mt6797.c +++ b/drivers/clk/mediatek/clk-mt6797.c @@ -582,7 +582,7 @@ CLK_OF_DECLARE_DRIVER(mtk_infra, "mediatek,mt6797-infracfg", static int mtk_infrasys_init(struct platform_device *pdev) { - int r, i; + int i; struct device_node *node = pdev->dev.of_node; if (!infra_clk_data) { @@ -599,11 +599,7 @@ static int mtk_infrasys_init(struct platform_device *pdev) mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs), infra_clk_data); - r = of_clk_add_provider(node, of_clk_src_onecell_get, infra_clk_data); - if (r) - return r; - - return 0; + return of_clk_add_provider(node, of_clk_src_onecell_get, infra_clk_data); } #define MT6797_PLL_FMAX (3000UL * MHZ) -- 2.25.1