From: Faiz Abbas <faiz_abbas@ti.com>
To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-mmc@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Cc: <adrian.hunter@intel.com>, <robh+dt@kernel.org>,
<ulf.hansson@linaro.org>, <kishon@ti.com>, <faiz_abbas@ti.com>
Subject: [PATCH 2/6] dt-bindings: mmc: sdhci-am654: Add documentation for input tap delay
Date: Wed, 23 Sep 2020 16:22:02 +0530 [thread overview]
Message-ID: <20200923105206.7988-3-faiz_abbas@ti.com> (raw)
In-Reply-To: <20200923105206.7988-1-faiz_abbas@ti.com>
Add documentation for input tap delay bindings.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
.../devicetree/bindings/mmc/sdhci-am654.yaml | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml
index c222e057eca9..ac79f3adf20b 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml
@@ -114,6 +114,46 @@ properties:
minimum: 0
maximum: 0xf
+ # PHY input tap delays:
+ # Used to delay the data valid window and align it to the sampling clock for
+ # modes that don't support tuning
+
+ ti,itap-del-sel-legacy:
+ description: Input tap delay for SD/MMC legacy timing
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 0x1f
+
+ ti,itap-del-sel-mmc-hs:
+ description: Input tap delay for MMC high speed timing
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 0x1f
+
+ ti,itap-del-sel-sd-hs:
+ description: Input tap delay for SD high speed timing
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 0x1f
+
+ ti,itap-del-sel-sdr12:
+ description: Input tap delay for SD UHS SDR12 timing
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 0x1f
+
+ ti,itap-del-sel-sdr25:
+ description: Input tap delay for SD UHS SDR25 timing
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 0x1f
+
+ ti,itap-del-sel-ddr52:
+ description: Input tap delay for MMC DDR52 timing
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 0x1f
+
ti,trm-icp:
description: DLL trim select
$ref: "/schemas/types.yaml#/definitions/uint32"
@@ -170,6 +210,9 @@ examples:
ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x5>;
ti,otap-del-sel-hs400 = <0x0>;
+ ti,itap-del-sel-legacy = <0x10>;
+ ti,itap-del-sel-mmc-hs = <0xa>;
+ ti,itap-del-sel-ddr52 = <0x3>;
ti,trm-icp = <0x8>;
};
};
--
2.17.1
next prev parent reply other threads:[~2020-09-23 10:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-23 10:52 [PATCH 0/6] Add UHS mode support for TI's AM65x, J721e, J7200 boards Faiz Abbas
2020-09-23 10:52 ` [PATCH 1/6] dt-bindings: mmc: sdhci-am654: Convert sdhci-am654 controller documentation to json schema Faiz Abbas
2020-09-23 10:52 ` Faiz Abbas [this message]
2020-09-23 10:52 ` [PATCH 3/6] mmc: sdhci_am654: Fix hard coded otap delay array size Faiz Abbas
2020-09-23 10:52 ` [PATCH 4/6] mmc: sdhci_am654: Add support for input tap delay Faiz Abbas
2020-09-23 10:52 ` [PATCH 5/6] mmc: sdhci_am654: Add support for software tuning Faiz Abbas
2020-09-25 4:49 ` Kishon Vijay Abraham I
2020-09-23 10:52 ` [PATCH 6/6] mmc: sdhci_am654: Enable tuning for SDR50 Faiz Abbas
2020-09-28 10:34 ` [PATCH 0/6] Add UHS mode support for TI's AM65x, J721e, J7200 boards Ulf Hansson
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