From: Yuichi Ito <ito-yuichi@fujitsu.com>
To: maz@kernel.org, sumit.garg@linaro.org, tglx@linutronix.de,
jason@lakedaemon.net, catalin.marinas@arm.com, will@kernel.org
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] irqchip/gic-v3: Enable support for SGIs to act as NMIs
Date: Thu, 24 Sep 2020 13:42:35 +0900 [thread overview]
Message-ID: <20200924044236.1245808-2-ito-yuichi@fujitsu.com> (raw)
In-Reply-To: <20200924044236.1245808-1-ito-yuichi@fujitsu.com>
From: Sumit Garg <sumit.garg@linaro.org>
Add support to handle SGIs as regular NMIs. As SGIs or IPIs defaults to a
special flow handler: handle_percpu_devid_fasteoi_ipi(), so skip NMI
handler update in case of SGIs.
Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
as IRQs/NMIs happen as part of this routine.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
drivers/irqchip/irq-gic-v3.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 262bc7377abd..2eda18d1df59 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -477,6 +477,11 @@ static int gic_irq_nmi_setup(struct irq_data *d)
if (WARN_ON(gic_irq(d) >= 8192))
return -EINVAL;
+ if (get_intid_range(d) == SGI_RANGE) {
+ gic_irq_set_prio(d, GICD_INT_NMI_PRI);
+ return 0;
+ }
+
/* desc lock should already be held */
if (gic_irq_in_rdist(d)) {
u32 idx = gic_get_ppi_index(d);
@@ -514,6 +519,11 @@ static void gic_irq_nmi_teardown(struct irq_data *d)
if (WARN_ON(gic_irq(d) >= 8192))
return;
+ if (get_intid_range(d) == SGI_RANGE) {
+ gic_irq_set_prio(d, GICD_INT_DEF_PRI);
+ return;
+ }
+
/* desc lock should already be held */
if (gic_irq_in_rdist(d)) {
u32 idx = gic_get_ppi_index(d);
@@ -1708,6 +1718,7 @@ static int __init gic_init_bases(void __iomem *dist_base,
gic_dist_init();
gic_cpu_init();
+ gic_enable_nmi_support();
gic_smp_init();
gic_cpu_pm_init();
@@ -1719,8 +1730,6 @@ static int __init gic_init_bases(void __iomem *dist_base,
gicv2m_init(handle, gic_data.domain);
}
- gic_enable_nmi_support();
-
return 0;
out_free:
--
2.25.1
next prev parent reply other threads:[~2020-09-24 4:55 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-24 4:42 [PATCH 0/2] Enable support IPI_CPU_CRASH_STOP to be pseudo-NMI Yuichi Ito
2020-09-24 4:42 ` Yuichi Ito [this message]
2020-09-24 4:42 ` [PATCH 2/2] Register IPI_CPU_CRASH_STOP IPI as pseudo-NMI Yuichi Ito
2020-09-28 2:43 ` [PATCH 0/2] Enable support IPI_CPU_CRASH_STOP to be pseudo-NMI ito-yuichi
2020-09-28 8:59 ` Marc Zyngier
2020-09-29 5:50 ` ito-yuichi
2020-09-29 10:54 ` Marc Zyngier
2020-09-30 8:51 ` ito-yuichi
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