From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: Zhen Lei <thunder.leizhen@huawei.com>,
linux-kernel@vger.kernel.org (open list:CLOCKSOURCE,
CLOCKEVENT DRIVERS)
Subject: [PATCH 09/10] clocksource/drivers/sp804: Add support for Hisilicon sp804 timer
Date: Thu, 24 Sep 2020 11:05:33 +0200 [thread overview]
Message-ID: <20200924090534.2004630-9-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20200924090534.2004630-1-daniel.lezcano@linaro.org>
From: Zhen Lei <thunder.leizhen@huawei.com>
The ARM SP804 supports a maximum of 32-bit counter, but Hisilicon extends
it to 64-bit. That means, the registers: TimerXload, TimerXValue and
TimerXBGLoad are 64bits, all other registers are the same as those in the
SP804. The driver code can be completely reused except that the register
offset is different.
Use compatible = "hisilicon,sp804" mark as Hisilicon sp804 timer.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200918132237.3552-8-thunder.leizhen@huawei.com
---
drivers/clocksource/timer-sp804.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c
index 5f4f979a8ef2..f0783d19522f 100644
--- a/drivers/clocksource/timer-sp804.c
+++ b/drivers/clocksource/timer-sp804.c
@@ -20,6 +20,18 @@
#include "timer-sp.h"
+/* Hisilicon 64-bit timer(a variant of ARM SP804) */
+#define HISI_TIMER_1_BASE 0x00
+#define HISI_TIMER_2_BASE 0x40
+#define HISI_TIMER_LOAD 0x00
+#define HISI_TIMER_VALUE 0x08
+#define HISI_TIMER_CTRL 0x10
+#define HISI_TIMER_INTCLR 0x14
+#define HISI_TIMER_RIS 0x18
+#define HISI_TIMER_MIS 0x1c
+#define HISI_TIMER_BGLOAD 0x20
+
+
struct sp804_timer __initdata arm_sp804_timer = {
.load = TIMER_LOAD,
.value = TIMER_VALUE,
@@ -29,6 +41,15 @@ struct sp804_timer __initdata arm_sp804_timer = {
.width = 32,
};
+struct sp804_timer __initdata hisi_sp804_timer = {
+ .load = HISI_TIMER_LOAD,
+ .value = HISI_TIMER_VALUE,
+ .ctrl = HISI_TIMER_CTRL,
+ .intclr = HISI_TIMER_INTCLR,
+ .timer_base = {HISI_TIMER_1_BASE, HISI_TIMER_2_BASE},
+ .width = 64,
+};
+
static struct sp804_clkevt sp804_clkevt[NR_TIMERS];
static long __init sp804_get_clock_rate(struct clk *clk, const char *name)
@@ -315,6 +336,12 @@ static int __init arm_sp804_of_init(struct device_node *np)
}
TIMER_OF_DECLARE(sp804, "arm,sp804", arm_sp804_of_init);
+static int __init hisi_sp804_of_init(struct device_node *np)
+{
+ return sp804_of_init(np, &hisi_sp804_timer);
+}
+TIMER_OF_DECLARE(hisi_sp804, "hisilicon,sp804", hisi_sp804_of_init);
+
static int __init integrator_cp_of_init(struct device_node *np)
{
static int init_count = 0;
--
2.25.1
next prev parent reply other threads:[~2020-09-24 9:06 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-24 9:04 [GIT PULL] timer drivers for v5.10 Daniel Lezcano
2020-09-24 9:05 ` [PATCH 01/10] dt-bindings: timer: renesas,cmt: Document r8a7742 CMT support Daniel Lezcano
2020-09-24 9:05 ` [PATCH 02/10] dt-bindings: timer: renesas,cmt: Document r8a774e1 " Daniel Lezcano
2020-09-24 9:05 ` [PATCH 03/10] clocksource/drivers/sp804: Cleanup clk_get_sys() Daniel Lezcano
2020-09-24 9:05 ` [PATCH 04/10] clocksource/drivers/sp804: Remove unused sp804_timer_disable() and timer-sp804.h Daniel Lezcano
2020-09-24 9:05 ` [PATCH 05/10] clocksource/drivers/sp804: Delete the leading "__" of some functions Daniel Lezcano
2020-09-24 9:05 ` [PATCH 06/10] clocksource/drivers/sp804: Remove a mismatched comment Daniel Lezcano
2020-09-24 9:05 ` [PATCH 07/10] clocksource/drivers/sp804: Prepare for support non-standard register offset Daniel Lezcano
2020-09-24 9:05 ` [PATCH 08/10] clocksource/drivers/sp804: Support " Daniel Lezcano
2020-09-24 9:05 ` Daniel Lezcano [this message]
2020-09-24 9:05 ` [PATCH 10/10] clocksource/drivers/sp804: Enable Hisilicon sp804 timer 64bit mode Daniel Lezcano
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