From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Lai Jiangshan <jiangshanlai@gmail.com>,
Lai Jiangshan <laijs@linux.alibaba.com>
Subject: [PATCH 5/5] KVM: x86: Let the guest own CR4.FSGSBASE
Date: Tue, 29 Sep 2020 21:16:59 -0700 [thread overview]
Message-ID: <20200930041659.28181-6-sean.j.christopherson@intel.com> (raw)
In-Reply-To: <20200930041659.28181-1-sean.j.christopherson@intel.com>
From: Lai Jiangshan <laijs@linux.alibaba.com>
Add FSGSBASE to the set of possible guest-owned CR4 bits, i.e. let the
guest own it on VMX. KVM never queries the guest's CR4.FSGSBASE value,
thus there is no reason to force VM-Exit on FSGSBASE being toggled.
Note, because FSGSBASE is conditionally available, this is dependent on
recent changes to intercept reserved CR4 bits and to update the CR4
guest/host mask in response to guest CPUID changes.
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
[sean: added justification in changelog]
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
arch/x86/kvm/kvm_cache_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h
index ca0781b41df9..a889563ad02d 100644
--- a/arch/x86/kvm/kvm_cache_regs.h
+++ b/arch/x86/kvm/kvm_cache_regs.h
@@ -7,7 +7,7 @@
#define KVM_POSSIBLE_CR0_GUEST_BITS X86_CR0_TS
#define KVM_POSSIBLE_CR4_GUEST_BITS \
(X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \
- | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD)
+ | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD | X86_CR4_FSGSBASE)
#define BUILD_KVM_GPR_ACCESSORS(lname, uname) \
static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\
--
2.28.0
next prev parent reply other threads:[~2020-09-30 4:17 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 4:16 [PATCH 0/5] KVM: x86: Handle reserved CR4 bit interception in VMX Sean Christopherson
2020-09-30 4:16 ` [PATCH 1/5] KVM: x86: Intercept LA57 to inject #GP fault when it's reserved Sean Christopherson
2020-09-30 4:16 ` [PATCH 2/5] KVM: x86: Invoke vendor's vcpu_after_set_cpuid() after all common updates Sean Christopherson
2020-09-30 4:16 ` [PATCH 3/5] KVM: x86: Move call to update_exception_bitmap() into VMX code Sean Christopherson
2020-09-30 4:16 ` [PATCH 4/5] KVM: VMX: Intercept guest reserved CR4 bits to inject #GP fault Sean Christopherson
2020-09-30 4:16 ` Sean Christopherson [this message]
2020-10-19 15:59 ` [PATCH 0/5] KVM: x86: Handle reserved CR4 bit interception in VMX Paolo Bonzini
2020-10-20 9:13 ` Paolo Bonzini
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