From: Shiju Jose <shiju.jose@huawei.com>
To: <linux-edac@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <bp@alien8.de>,
<tony.luck@intel.com>, <rjw@rjwysocki.net>, <james.morse@arm.com>,
<lenb@kernel.org>
Cc: <linuxarm@huawei.com>, <shiju.jose@huawei.com>
Subject: [RFC PATCH 3/7] RAS/CEC: Move X86 MCE specific code under CONFIG_X86_MCE
Date: Fri, 2 Oct 2020 13:22:31 +0100 [thread overview]
Message-ID: <20201002122235.1280-4-shiju.jose@huawei.com> (raw)
In-Reply-To: <20201002122235.1280-1-shiju.jose@huawei.com>
CEC may need to support other architectures such as ARM64.
Move X86 MCE specific code under CONFIG_X86_MCE to support
building for other architectures.
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
---
drivers/ras/cec.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/ras/cec.c b/drivers/ras/cec.c
index f20da1103f27..803e641d8e5c 100644
--- a/drivers/ras/cec.c
+++ b/drivers/ras/cec.c
@@ -8,7 +8,9 @@
#include <linux/kernel.h>
#include <linux/workqueue.h>
+#if defined(CONFIG_X86_MCE)
#include <asm/mce.h>
+#endif
#include "debugfs.h"
@@ -511,6 +513,7 @@ static int __init create_debugfs_nodes(void)
if (!IS_ENABLED(CONFIG_RAS_CEC_DEBUG))
return 0;
+#if defined(CONFIG_X86_MCE)
pfn = debugfs_create_file("pfn", S_IRUSR | S_IWUSR, d, &dfs_pfn, &pfn_ops);
if (!pfn) {
pr_warn("Error creating pfn debugfs node!\n");
@@ -522,6 +525,7 @@ static int __init create_debugfs_nodes(void)
pr_warn("Error creating array debugfs node!\n");
goto err;
}
+#endif
return 0;
@@ -531,6 +535,7 @@ static int __init create_debugfs_nodes(void)
return 1;
}
+#if defined(CONFIG_X86_MCE)
static int cec_notifier(struct notifier_block *nb, unsigned long val,
void *data)
{
@@ -556,28 +561,33 @@ static struct notifier_block cec_nb = {
.notifier_call = cec_notifier,
.priority = MCE_PRIO_CEC,
};
+#endif
static void __init cec_init(void)
{
if (ce_arr.disabled)
return;
+#if defined(CONFIG_X86_MCE)
ce_arr.array = (void *)get_zeroed_page(GFP_KERNEL);
if (!ce_arr.array) {
pr_err("Error allocating CE array page!\n");
return;
}
+#endif
if (create_debugfs_nodes()) {
free_page((unsigned long)ce_arr.array);
return;
}
+#if defined(CONFIG_X86_MCE)
ce_arr.id_shift = PAGE_SHIFT;
INIT_DELAYED_WORK(&cec_work, cec_work_fn);
schedule_delayed_work(&cec_work, CEC_DECAY_DEFAULT_INTERVAL);
mce_register_decode_chain(&cec_nb);
+#endif
pr_info("Correctable Errors collector initialized.\n");
}
--
2.17.1
next prev parent reply other threads:[~2020-10-02 12:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-02 12:22 [RFC PATCH 0/7] RAS/CEC: Extend CEC for errors count check on short time period Shiju Jose
2020-10-02 12:22 ` [RFC PATCH 1/7] RAS/CEC: Replace the macro PFN with ELEM_NO Shiju Jose
2020-10-02 12:22 ` [RFC PATCH 2/7] RAS/CEC: Replace pfns_poisoned with elems_poisoned Shiju Jose
2020-10-02 12:22 ` Shiju Jose [this message]
2020-10-02 12:22 ` [RFC PATCH 4/7] RAS/CEC: Modify cec_mod_work() for common use Shiju Jose
2020-10-02 12:22 ` [RFC PATCH 5/7] RAS/CEC: Add support for errors count check on short time period Shiju Jose
2020-10-02 12:22 ` [RFC PATCH 6/7] RAS/CEC: Add CPU Correctable Error Collector to isolate an erroneous CPU core Shiju Jose
2020-10-02 12:22 ` [RFC PATCH 7/7] ACPI / APEI: Add reporting ARM64 CPU correctable errors to the CEC Shiju Jose
2020-10-02 12:43 ` [RFC PATCH 0/7] RAS/CEC: Extend CEC for errors count check on short time period Borislav Petkov
2020-10-02 15:38 ` Shiju Jose
2020-10-02 17:33 ` James Morse
2020-10-02 18:02 ` Borislav Petkov
2020-10-06 16:13 ` Shiju Jose
2020-10-07 16:45 ` James Morse
2020-10-02 16:04 ` Luck, Tony
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