[PATCH 0/3] x86: Add initial support to discover Intel hybrid CPUs

[Ricardo Neri <ricardo.neri-calderon@linux.intel.com>]

Add support to discover and enumerate CPUs in Intel hybrid parts. A hybrid
part has CPUs with more than one type of micro-architecture. Thus, certain
features may only be present in a specific CPU type.

It is useful to know the type of CPUs present in a system. For instance,
perf may need to handle CPUs differently depending on the type of micro-
architecture. Decoding machine check error logs may need the additional
micro-architecture type information, so include that in the log.

A hybrid part can be identified by reading a new CPUID feature bit.
Likewise, CPUID contains information about the CPU type as well as a new
native model ID. Details can be found in the Intel manual (SDM, [1]).

This series adds support for Intel hybrid parts in two areas: a) adding
the hybrid feature bit as well as struct cpuinfo_x86; and b) decode machine
check errors on hybrid parts.

A later submission will use the proposed functionality to expose the CPU
topology to user space.

Thanks and BR,
Ricardo

[1].
https://software.intel.com/content/dam/develop/public/us/en/documents/325462-sdm-vol-1-2abcd-3abcd.pdf
Vol 2. Section 3.2.CPUID leaf 0x1a

Ricardo Neri (3):
  x86/cpufeatures: Enumerate hybrid CPU feature bit
  x86/cpu: Describe hybrid CPUs in cpuinfo_x86
  x86/mce: include type of core when reporting a machine check error

 arch/x86/include/asm/cpufeatures.h |  1 +
 arch/x86/include/asm/processor.h   | 13 +++++++++++++
 arch/x86/include/uapi/asm/mce.h    |  1 +
 arch/x86/kernel/cpu/common.c       |  5 +++++
 arch/x86/kernel/cpu/mce/core.c     |  7 +++++++
 5 files changed, 27 insertions(+)

-- 
2.17.1