From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Subject: [patch 1/2] x86/fpu: Simplify fpregs_[un]lock()
Date: Tue, 27 Oct 2020 11:09:50 +0100 [thread overview]
Message-ID: <20201027101349.455380473@linutronix.de> (raw)
In-Reply-To: <20201027100949.181320853@linutronix.de>
There is no point in disabling preemption and then disabling bottom
halfs.
Just disabling bottom halfs is sufficient as it implicitly disables
preemption on !RT kernels.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/include/asm/fpu/api.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/arch/x86/include/asm/fpu/api.h
+++ b/arch/x86/include/asm/fpu/api.h
@@ -29,17 +29,18 @@ extern void fpregs_mark_activate(void);
* A context switch will (and softirq might) save CPU's FPU registers to
* fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in
* a random state.
+ *
+ * local_bh_disable() protects against both preemption and soft interrupts
+ * on !RT kernels.
*/
static inline void fpregs_lock(void)
{
- preempt_disable();
local_bh_disable();
}
static inline void fpregs_unlock(void)
{
local_bh_enable();
- preempt_enable();
}
#ifdef CONFIG_X86_DEBUG_FPU
next prev parent reply other threads:[~2020-10-27 10:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-27 10:09 [patch 0/2] x86/fpu: Make fpu_lock() RT compliant Thomas Gleixner
2020-10-27 10:09 ` Thomas Gleixner [this message]
2020-11-11 13:36 ` [tip: x86/fpu] x86/fpu: Simplify fpregs_[un]lock() tip-bot2 for Thomas Gleixner
2020-10-27 10:09 ` [patch 2/2] x86/fpu: Make kernel FPU protection RT friendly Thomas Gleixner
2020-10-27 10:42 ` Sebastian Andrzej Siewior
2020-11-11 13:36 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
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