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From: Segher Boessenkool <segher@kernel.crashing.org>
To: Borislav Petkov <bp@alien8.de>
Cc: shuo.a.liu@intel.com, linux-kernel@vger.kernel.org,
	x86@kernel.org, Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"H . Peter Anvin" <hpa@zytor.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Yu Wang <yu1.wang@intel.com>,
	Reinette Chatre <reinette.chatre@intel.com>,
	Yakui Zhao <yakui.zhao@intel.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Fengwei Yin <fengwei.yin@intel.com>,
	Zhi Wang <zhi.a.wang@intel.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	Arvind Sankar <nivedita@alum.mit.edu>,
	Peter Zijlstra <peterz@infradead.org>,
	Nick Desaulniers <ndesaulniers@google.com>
Subject: Re: [PATCH v5 04/17] x86/acrn: Introduce hypercall interfaces
Date: Mon, 2 Nov 2020 17:18:09 -0600	[thread overview]
Message-ID: <20201102231809.GC2672@gate.crashing.org> (raw)
In-Reply-To: <20201102225439.GI15392@zn.tnic>

On Mon, Nov 02, 2020 at 11:54:39PM +0100, Borislav Petkov wrote:
> On Mon, Nov 02, 2020 at 02:01:13PM -0600, Segher Boessenkool wrote:
> > It just asks the general_operand function, which (for registers) accepts
> > the hard registers that are accessible.  This does include the float and
> > vector etc. registers, normally.
> > 
> > But you usually have a pseudo-register there (which is always allowed
> > here), unless you used some register asm variable.
> 
> You mean like this:
> 
> ---
> int main(void)
> {
> 	register float foo asm ("xmm0") = 0.99f;
> 
>         asm volatile("movl %0, %%r8d\n\t"
>                       "vmcall\n\t"
>                       :: "g" (foo));
> 
>         return 0;
> }
> ---
> 
> That works ok AFAICT:
> 
> ---
> 
> 0000000000000000 <main>:
>    0:   55                      push   %rbp
>    1:   48 89 e5                mov    %rsp,%rbp
>    4:   f3 0f 10 05 00 00 00    movss  0x0(%rip),%xmm0        # c <main+0xc>
>    b:   00 
>    c:   66 0f 7e c0             movd   %xmm0,%eax
>   10:   41 89 c0                mov    %eax,%r8d
>   13:   0f 01 c1                vmcall 
>   16:   b8 00 00 00 00          mov    $0x0,%eax
>   1b:   5d                      pop    %rbp
>   1c:   c3                      retq
> 
> ---

That is invalid actually: local register asm as input to an inline asm
should use *that* register!

This is all correct until LRA ("reload").  Not that "movl %xmm0,$eax"
works, but at least it screams its head off, as it should.  And then LRA
puts it in %eax, a different register than asked for.

> gcc smartypants shuffles it through a GPR before sticking it into %r8.
> 
> It works too If I use a float immediate:
> 
> ---
> int main(void)
> {
>         asm volatile("movl %0, %%r8d\n\t"
>                       "vmcall\n\t"
>                       :: "g" (0.99f));
>                       
>         return 0;     
> }
> ---
> 
> ---
> 0000000000000000 <main>:
>    0:   55                      push   %rbp
>    1:   48 89 e5                mov    %rsp,%rbp
>    4:   41 b8 a4 70 7d 3f       mov    $0x3f7d70a4,%r8d
>    a:   0f 01 c1                vmcall 
>    d:   b8 00 00 00 00          mov    $0x0,%eax
>   12:   5d                      pop    %rbp
>   13:   c3                      retq
> ---

(this one is correct code)

> or maybe I'm missing some freaky way to specify the input operand so
> that I can make it take a float register. But even if I could, it would
> error out when generating the asm, I presume, due to invalid insn or
> whatnot.

Yes.  But GCC doing what you should have said instead of doing what you
said, is not good.

> > And pseudos usually are allocated a simple integer register during
> > register allocation, in an asm that is.
> 
> Interesting.
> 
> > > Might even make people copying from bad examples
> > > to go look at the docs first...
> > 
> > Optimism is cool :-)
> 
> In my experience so far, documenting stuff better might not always bring
> the expected results but sometimes it does move people in the most
> unexpected way and miracles happen.
> 
> :-)))

Now if only we had time to document what we wrote!  We *do* write docs
to go with new code (maybe not enough always), but no one spends a lot
of time on documenting the existing compiler, or with a larger view than
just a single aspect of the compiler.  Alas.


Segher

  reply	other threads:[~2020-11-02 23:24 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-19  6:17 [PATCH v5 00/17] HSM driver for ACRN hypervisor shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 01/17] docs: acrn: Introduce ACRN shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 02/17] x86/acrn: Introduce acrn_{setup, remove}_intr_handler() shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 03/17] x86/acrn: Introduce an API to check if a VM is privileged shuo.a.liu
2020-11-02 14:37   ` Borislav Petkov
2020-11-03  6:27     ` Shuo A Liu
2020-11-03 10:25       ` Borislav Petkov
2020-11-04  3:50         ` Shuo A Liu
2020-11-04 18:51           ` Borislav Petkov
2020-11-05  3:25             ` Shuo A Liu
2020-10-19  6:17 ` [PATCH v5 04/17] x86/acrn: Introduce hypercall interfaces shuo.a.liu
2020-10-19 21:53   ` Nick Desaulniers
2020-10-19 22:15   ` Arvind Sankar
2020-10-20  1:38     ` Shuo A Liu
2020-10-20  2:08       ` Arvind Sankar
2020-10-20  2:30         ` Shuo A Liu
2020-10-20 14:16           ` Arvind Sankar
2020-10-21  1:16             ` Shuo A Liu
2020-11-02 14:56   ` Borislav Petkov
2020-11-02 16:09     ` Segher Boessenkool
2020-11-02 17:19       ` Borislav Petkov
2020-11-02 18:10         ` Segher Boessenkool
2020-11-02 18:34           ` Borislav Petkov
2020-11-02 20:01             ` Segher Boessenkool
2020-11-02 22:54               ` Borislav Petkov
2020-11-02 23:18                 ` Segher Boessenkool [this message]
2020-11-03 16:44                   ` Borislav Petkov
2020-11-03 18:47                     ` Segher Boessenkool
2020-11-03 19:43                       ` Borislav Petkov
2020-10-19  6:17 ` [PATCH v5 05/17] virt: acrn: Introduce ACRN HSM basic driver shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 06/17] virt: acrn: Introduce VM management interfaces shuo.a.liu
2020-11-04 19:02   ` Greg Kroah-Hartman
2020-11-05  3:10     ` Shuo A Liu
2020-11-05  6:29       ` Greg Kroah-Hartman
2020-11-05  7:35         ` Shuo A Liu
2020-11-05  8:26           ` Greg Kroah-Hartman
2020-11-05  9:02             ` Shuo A Liu
2020-11-05  9:16               ` Greg Kroah-Hartman
2020-11-05 12:48                 ` Shuo A Liu
2020-11-05 13:04                   ` Greg Kroah-Hartman
2020-10-19  6:17 ` [PATCH v5 07/17] virt: acrn: Introduce an ioctl to set vCPU registers state shuo.a.liu
2020-11-09 17:09   ` Greg Kroah-Hartman
2020-11-10 13:14     ` Shuo A Liu
2020-11-10 14:54       ` Greg Kroah-Hartman
2020-11-11  9:54         ` Shuo A Liu
2020-11-11 10:28           ` Greg Kroah-Hartman
2020-11-11 12:03             ` Shuo A Liu
2020-11-11 12:29               ` Greg Kroah-Hartman
2020-11-11 16:55                 ` Shuo A Liu
2020-10-19  6:17 ` [PATCH v5 08/17] virt: acrn: Introduce EPT mapping management shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 09/17] virt: acrn: Introduce I/O request management shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 10/17] virt: acrn: Introduce PCI configuration space PIO accesses combiner shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 11/17] virt: acrn: Introduce interfaces for PCI device passthrough shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 12/17] virt: acrn: Introduce interrupt injection interfaces shuo.a.liu
2020-10-19  6:17 ` [PATCH v5 13/17] virt: acrn: Introduce interfaces to query C-states and P-states allowed by hypervisor shuo.a.liu
2020-10-19  6:18 ` [PATCH v5 14/17] virt: acrn: Introduce I/O ranges operation interfaces shuo.a.liu
2020-10-19  6:18 ` [PATCH v5 15/17] virt: acrn: Introduce ioeventfd shuo.a.liu
2020-10-19  6:18 ` [PATCH v5 16/17] virt: acrn: Introduce irqfd shuo.a.liu
2020-10-19  6:18 ` [PATCH v5 17/17] virt: acrn: Introduce an interface for Service VM to control vCPU shuo.a.liu
2020-10-21 15:19 ` [PATCH v5 00/17] HSM driver for ACRN hypervisor Dave Hansen
2020-10-26  0:39   ` Shuo A Liu

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