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Wed, 4 Nov 2020 07:43:07 -0500 (EST) Date: Wed, 4 Nov 2020 13:43:06 +0100 From: Maxime Ripard To: Robin Murphy Cc: Christoph Hellwig , devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Paul Kocialkowski , Chen-Yu Tsai , iommu@lists.linux-foundation.org, Yong Deng , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Subject: Re: use of dma_direct_set_offset in (allwinner) drivers Message-ID: <20201104124306.65nfvmr3ceggug4z@gilmour.lan> References: <20201103095538.GA19136@lst.de> <20201104081411.bnt5kixgunaczbzj@gilmour.lan> <9623c346-c86c-e3ce-332b-95492576a859@arm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="zhorkoablbmsvz4w" Content-Disposition: inline In-Reply-To: <9623c346-c86c-e3ce-332b-95492576a859@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --zhorkoablbmsvz4w Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Nov 04, 2020 at 10:15:49AM +0000, Robin Murphy wrote: > On 2020-11-04 08:14, Maxime Ripard wrote: > > Hi Christoph, > >=20 > > On Tue, Nov 03, 2020 at 10:55:38AM +0100, Christoph Hellwig wrote: > > > Linux 5.10-rc1 switched from having a single dma offset in struct dev= ice > > > to a set of DMA ranges, and introduced a new helper to set them, > > > dma_direct_set_offset. > > >=20 > > > This in fact surfaced that a bunch of drivers that violate our layeri= ng > > > and set the offset from drivers, which meant we had to reluctantly > > > export the symbol to set up the DMA range. > > >=20 > > > The drivers are: > > >=20 > > > drivers/gpu/drm/sun4i/sun4i_backend.c > > >=20 > > > This just use dma_direct_set_offset as a fallback. Is there any g= ood > > > reason to not just kill off the fallback? > > >=20 > > > drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c > > >=20 > > > Same as above. > >=20 > > So, the history of this is: > >=20 > > - We initially introduced the support for those two controllers > > assuming that there was a direct mapping between the physical and > > DMA addresses. It turns out it didn't and the DMA accesses were > > going through a secondary, dedicated, bus that didn't have the same > > mapping of the RAM than the CPU. > >=20 > > 4690803b09c6 ("drm/sun4i: backend: Offset layer buffer address by = DRAM starting address") > >=20 > > - This dedicated bus is undocumented and barely used in the vendor > > kernel so this was overlooked, and it's fairly hard to get infos on > > it for all the SoCs we support. We added the DT support for it > > though on some SoCs we had enough infos to do so: > >=20 > > c43a4469402f ("dt-bindings: interconnect: Add a dma interconnect n= ame") > > 22f88e311399 ("ARM: dts: sun5i: Add the MBUS controller") > >=20 > > This explains the check on the interconnect property > >=20 > > - However, due to the stable DT rule, we still need to operate witho= ut > > regressions on older DTs that wouldn't have that property (and for > > SoCs we haven't figured out). Hence the fallback. >=20 > How about having something in the platform code that keys off the top-lev= el > SoC compatible and uses a bus notifier to create offsets for the relevant > devices if an MBUS description is missing? At least that way the workarou= nd > could be confined to a single dedicated place and look somewhat similar to > other special cases like sta2x11, rather than being duplicated all over t= he > place. I'll give it a try, thanks for the suggestion :) Maxime --zhorkoablbmsvz4w Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCX6Kh2gAKCRDj7w1vZxhR xXUBAQCk9nFoP5/0upXw2XdZcSkENhaqLEYjyqa2eDCp2Rmb8QEApdDUSCwIotfs OBET+OLoM/9OhyjnL3e/+1Kb+EGvqA4= =D3ug -----END PGP SIGNATURE----- --zhorkoablbmsvz4w--