From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Evan Green <evgreen@chromium.org>,
Andy Shevchenko <andy@kernel.org>,
stable@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] pinctrl: intel: Fix Jasperlake HOSTSW_OWN offset
Date: Thu, 12 Nov 2020 15:57:22 +0200 [thread overview]
Message-ID: <20201112135722.GE4077@smile.fi.intel.com> (raw)
In-Reply-To: <20201112091100.GZ2495@lahna.fi.intel.com>
On Thu, Nov 12, 2020 at 11:11:00AM +0200, Mika Westerberg wrote:
> On Wed, Nov 11, 2020 at 03:17:28PM -0800, Evan Green wrote:
> > GPIOs that attempt to use interrupts get thwarted with a message like:
> > "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
> > the HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
> > owned by ACPI.
> >
> > Fixes: e278dcb7048b1 ("pinctrl: intel: Add Intel Jasper Lake pin controller support")
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Evan Green <evgreen@chromium.org>
>
> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Pushed to my review and testing queue, thanks!
--
With Best Regards,
Andy Shevchenko
prev parent reply other threads:[~2020-11-12 13:56 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-11 23:17 Evan Green
2020-11-12 9:11 ` Mika Westerberg
2020-11-12 13:57 ` Andy Shevchenko [this message]
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