From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Cc: kishon@ti.com, vkoul@kernel.org, robh+dt@kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
mgross@linux.intel.com, lakshmi.bai.raja.subramanian@intel.com
Subject: Re: [PATCH v3 2/2] phy: intel: Add Keem Bay USB PHY support
Date: Thu, 12 Nov 2020 16:29:05 +0200 [thread overview]
Message-ID: <20201112142905.GH4077@smile.fi.intel.com> (raw)
In-Reply-To: <20201112095821.27110-3-wan.ahmad.zainie.wan.mohamad@intel.com>
On Thu, Nov 12, 2020 at 05:58:21PM +0800, Wan Ahmad Zainie wrote:
> Add support for USB PHY on Intel Keem Bay SoC.
Any elaboration here? What is this PHY (USB2 or USB3 or?.. etc)?
...
> +config PHY_INTEL_KEEMBAY_USB
> + tristate "Intel Keem Bay USB PHY driver"
> + depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST)
It seems other drivers that are not using ARM specific calls moved to
depends on ARCH_KEEMBAY || COMPILE_TEST
> + depends on HAS_IOMEM
> + select GENERIC_PHY
> + select REGMAP_MMIO
...
> +#define USS_CPR_MASK 0x7f
GENMASK() ?
...
> +static const struct regmap_config keembay_regmap_config = {
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
.max_register?
> +};
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-11-12 14:28 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-12 9:58 [PATCH v3 0/2] " Wan Ahmad Zainie
2020-11-12 9:58 ` [PATCH v3 1/2] dt-bindings: phy: Add Intel Keem Bay USB PHY bindings Wan Ahmad Zainie
2020-11-12 9:58 ` [PATCH v3 2/2] phy: intel: Add Keem Bay USB PHY support Wan Ahmad Zainie
2020-11-12 14:29 ` Andy Shevchenko [this message]
2020-11-13 3:46 ` Wan Mohamad, Wan Ahmad Zainie
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