From: Andrew Lunn <andrew@lunn.ch>
To: Dan Murphy <dmurphy@ti.com>
Cc: davem@davemloft.net, f.fainelli@gmail.com, hkallweit1@gmail.com,
robh@kernel.org, ciorneiioana@gmail.com,
devicetree@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v4 4/4] net: phy: dp83td510: Add support for the DP83TD510 Ethernet PHY
Date: Fri, 20 Nov 2020 02:49:19 +0100 [thread overview]
Message-ID: <20201120014919.GB1804098@lunn.ch> (raw)
In-Reply-To: <20201117201555.26723-5-dmurphy@ti.com>
> +static int dp83td510_config_init(struct phy_device *phydev)
> +{
> + struct dp83td510_private *dp83td510 = phydev->priv;
> + int ret = 0;
> +
> + if (phy_interface_is_rgmii(phydev)) {
> + if (dp83td510->rgmii_delay) {
> + ret = phy_set_bits_mmd(phydev, DP83TD510_DEVADDR,
> + DP83TD510_MAC_CFG_1,
> + dp83td510->rgmii_delay);
Just to be safe, you should always write rgmii_delay, even if it is
zero. We have had too many bugs with RGMII delays which cause bad
backwards compatibility problems, so i would prefer to do a write
which might be unneeded, that find a bug here in a few years time.
> + if (ret)
> + return ret;
> + }
> + }
> +
> + if (phydev->interface == PHY_INTERFACE_MODE_RMII) {
> + ret = phy_modify(phydev, DP83TD510_GEN_CFG,
> + DP83TD510_FIFO_DEPTH_MASK,
> + dp83td510->tx_fifo_depth);
So there is no need to set the FIFO depth for the other three RGMII
modes? Or should this also be phy_interface_is_rgmii(phydev)?
> +#if IS_ENABLED(CONFIG_OF_MDIO)
> +static int dp83td510_of_init(struct phy_device *phydev)
> +{
> + struct dp83td510_private *dp83td510 = phydev->priv;
> + struct device *dev = &phydev->mdio.dev;
> + struct device_node *of_node = dev->of_node;
You need to move this assignment to later in order to keep with
reverse christmas tree.
> +#else
> +static int dp83869_of_init(struct phy_device *phydev)
> +{
> + dp83td510->hi_diff_output = DP83TD510_2_4V_P2P
> + dp83td510->tx_fifo_depth = DP83TD510_FIFO_DEPTH_5_B_NIB
You don't have DT, so there is no fine control, but you still need to
do the basic 2ns delay as indicated by the phydev->interface value. So
i think you still need to set dp83td510->rgmii_delay depending on
which RGMII mode is requested.
Andrew
next prev parent reply other threads:[~2020-11-20 1:49 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 20:15 [PATCH net-next v4 0/4] DP83TD510 Single Pair 10Mbps " Dan Murphy
2020-11-17 20:15 ` [PATCH net-next v4 1/4] ethtool: Add 10base-T1L link mode entries Dan Murphy
2020-11-17 20:15 ` [PATCH net-next v4 2/4] dt-bindings: net: Add Rx/Tx output configuration for 10base T1L Dan Murphy
2020-11-17 20:31 ` Andrew Lunn
2020-11-17 20:36 ` Dan Murphy
2020-12-01 0:02 ` Rob Herring
2020-11-17 20:15 ` [PATCH net-next v4 3/4] dt-bindings: dp83td510: Add binding for DP83TD510 Ethernet PHY Dan Murphy
2020-12-01 0:13 ` Rob Herring
2020-11-17 20:15 ` [PATCH net-next v4 4/4] net: phy: dp83td510: Add support for the " Dan Murphy
2020-11-17 20:57 ` Ioana Ciornei
2020-11-18 7:36 ` kernel test robot
2020-11-20 1:49 ` Andrew Lunn [this message]
2020-11-30 16:57 ` Dan Murphy
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