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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id r7sm2978913oih.21.2020.12.07.08.01.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Dec 2020 08:01:54 -0800 (PST) Received: (nullmailer pid 356839 invoked by uid 1000); Mon, 07 Dec 2020 16:01:52 -0000 Date: Mon, 7 Dec 2020 10:01:52 -0600 From: Rob Herring To: mgross@linux.intel.com Cc: markgross@kernel.org, arnd@arndb.de, bp@suse.de, damien.lemoal@wdc.com, dragan.cvetic@xilinx.com, gregkh@linuxfoundation.org, corbet@lwn.net, leonard.crestez@nxp.com, palmerdabbelt@google.com, paul.walmsley@sifive.com, peng.fan@nxp.com, shawnguo@kernel.org, linux-kernel@vger.kernel.org, Daniele Alessandrelli , devicetree@vger.kernel.org Subject: Re: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver Message-ID: <20201207160152.GB351233@robh.at.kernel.org> References: <20201201223511.65542-1-mgross@linux.intel.com> <20201201223511.65542-3-mgross@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201201223511.65542-3-mgross@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Dec 01, 2020 at 02:34:51PM -0800, mgross@linux.intel.com wrote: > From: Daniele Alessandrelli > > Add DT binding documentation for the Intel Keem Bay IPC driver, which > enables communication between the Computing Sub-System (CSS) and the > Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem > Bay. > > Cc: devicetree@vger.kernel.org > Reviewed-by: Mark Gross > Signed-off-by: Daniele Alessandrelli > --- > .../bindings/soc/intel/intel,keembay-ipc.yaml | 63 +++++++++++++++++++ > 1 file changed, 63 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml > > diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml > new file mode 100644 > index 000000000000..6e21c54d8f34 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml > @@ -0,0 +1,63 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) 2020 Intel Corporation > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-ipc.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Keem Bay IPC > + > +maintainers: > + - Daniele Alessandrelli > + > +description: > + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the > + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named > + Keem Bay. Sounds like a mailbox. What's the relationship between this and the xlink thing? > + > +properties: > + compatible: > + const: intel,keembay-ipc > + > + reg: > + items: > + - description: The CSS (CPU) FIFO registers > + - description: The MSS (VPU) FIFO registers > + > + reg-names: > + items: > + - const: css_fifo > + - const: mss_fifo > + > + interrupts: > + items: > + - description: CSS FIFO not-empty interrupt > + > + interrupt-controller: true > + > + memory-region: > + items: > + - description: Reserved memory region used for CSS IPC buffers > + - description: Reserved memory region used for MSS IPC buffers > + > +required: > + - compatible > + - reg > + - reg-names > + - interrupts > + - memory-region > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + ipc@203300f0 { > + compatible = "intel,keembay-ipc"; > + reg = <0x203300f0 0x310>, /* CPU TIM FIFO */ > + <0x208200f0 0x310>; /* VPU TIM FIFO */ > + reg-names = "css_fifo", "mss_fifo"; > + interrupts = ; > + memory-region = <&css_ipc_reserved>, <&mss_ipc_reserved>; > + }; > -- > 2.17.1 >