From: Nadeem Athani <nadeem@cadence.com>
To: <tjoseph@cadence.com>, <lorenzo.pieralisi@arm.com>,
<robh@kernel.org>, <bhelgaas@google.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<kishon@ti.com>, <devicetree@vger.kernel.org>
Cc: <nadeem@cadence.com>, <mparab@cadence.com>,
<sjakhade@cadence.com>, <pthombar@cadence.com>
Subject: [PATCH v4 1/2] dt-bindings: pci: Retrain Link to work around Gen2 training defect.
Date: Fri, 11 Dec 2020 15:42:35 +0100 [thread overview]
Message-ID: <20201211144236.3825-2-nadeem@cadence.com> (raw)
In-Reply-To: <20201211144236.3825-1-nadeem@cadence.com>
Cadence controller will not initiate autonomous speed change if strapped as
Gen2. The Retrain Link bit is set as quirk to enable this speed change.
Adding a quirk flag based on a new compatible string.
Signed-off-by: Nadeem Athani <nadeem@cadence.com>
---
Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
index 293b8ec318bc..204d78f9efe3 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
@@ -15,7 +15,9 @@ allOf:
properties:
compatible:
- const: cdns,cdns-pcie-host
+ enum:
+ - cdns,cdns-pcie-host
+ - cdns,cdns-pcie-host-quirk-retrain
reg:
maxItems: 2
--
2.15.0
next prev parent reply other threads:[~2020-12-11 15:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-11 14:42 [PATCH v4 0/2] PCI: cadence: Retrain Link to work around Gen2 Nadeem Athani
2020-12-11 14:42 ` Nadeem Athani [this message]
2020-12-11 17:02 ` [PATCH v4 1/2] dt-bindings: pci: Retrain Link to work around Gen2 training defect Rob Herring
2020-12-12 7:07 ` Athani Nadeem Ladkhan
2020-12-14 4:20 ` Kishon Vijay Abraham I
2020-12-14 15:05 ` Rob Herring
2020-12-15 7:08 ` Kishon Vijay Abraham I
2020-12-11 14:42 ` [PATCH v4 2/2] PCI: cadence: " Nadeem Athani
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