From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4FDEC43381 for ; Tue, 5 Jan 2021 15:16:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 88B5A22B49 for ; Tue, 5 Jan 2021 15:16:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727795AbhAEPQ1 (ORCPT ); Tue, 5 Jan 2021 10:16:27 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:47798 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725868AbhAEPQZ (ORCPT ); Tue, 5 Jan 2021 10:16:25 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 105FEkDg060829; Tue, 5 Jan 2021 09:14:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1609859686; bh=v8DeDg+aSnj9XDWh6SjoEmvU220d2QLKrD8S48HIXT4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yj3aKO12UPKPJDi5acfYe5Z5HixKedicAFUAqOGjPncovWUqLadmDB6fYe6flW0Uy 9wZgOiwC35Z4yzkeTVY5k667STn+tC34Q58up1b9uHni828sJ48CTQCJGfGx8HKJwc mXESJfEeojXLvdL1CkuUAB1J/dVfuKGdIcojf52c= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 105FEkmC015441 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 5 Jan 2021 09:14:46 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 5 Jan 2021 09:14:46 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 5 Jan 2021 09:14:46 -0600 Received: from a0393678-ssd.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 105FEPOI005961; Tue, 5 Jan 2021 09:14:44 -0600 From: Kishon Vijay Abraham I To: Nishanth Menon , Rob Herring , Kishon Vijay Abraham I CC: , , Subject: [PATCH v4 6/6] arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe Date: Tue, 5 Jan 2021 20:44:21 +0530 Message-ID: <20210105151421.23237-7-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210105151421.23237-1-kishon@ti.com> References: <20210105151421.23237-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org x2 lane PCIe slot in the common processor board is enabled and connected to j7200 SOM. Add PCIe DT node in common processor board to reflect the same. Signed-off-by: Kishon Vijay Abraham I --- .../boot/dts/ti/k3-j7200-common-proc-board.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index def98f563336..4a7182abccf5 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "k3-j7200-som-p0.dtsi" +#include #include #include #include @@ -241,3 +242,17 @@ resets = <&serdes_wiz0 3>; }; }; + +&pcie1_rc { + reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; + phys = <&serdes0_pcie_link>; + phy-names = "pcie-phy"; + num-lanes = <2>; +}; + +&pcie1_ep { + phys = <&serdes0_pcie_link>; + phy-names = "pcie-phy"; + num-lanes = <2>; + status = "disabled"; +}; -- 2.17.1