From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01232C433DB for ; Tue, 12 Jan 2021 03:26:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B73DB22D6E for ; Tue, 12 Jan 2021 03:25:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726796AbhALDZo (ORCPT ); Mon, 11 Jan 2021 22:25:44 -0500 Received: from mga04.intel.com ([192.55.52.120]:60834 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725885AbhALDZn (ORCPT ); Mon, 11 Jan 2021 22:25:43 -0500 IronPort-SDR: EE0MKJ0qH3CoIuasbaO3Clo2vK474jpyRoy6VFZOFfW19Fno2ymWp6U4+/xA1eVQ2+vut1CbEg WGFA4XICN4sw== X-IronPort-AV: E=McAfee;i="6000,8403,9861"; a="175395081" X-IronPort-AV: E=Sophos;i="5.79,340,1602572400"; d="scan'208";a="175395081" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2021 19:25:03 -0800 IronPort-SDR: KcXMFxU0i8FJWdvqY2QcB8SnSv2fL6eqZK/yHiN36L6vswLw6RgUOK/EP1INLtmspZOiq5SYgi nAgf3yBLqx8Q== X-IronPort-AV: E=Sophos;i="5.79,340,1602572400"; d="scan'208";a="381261929" Received: from chenyu-office.sh.intel.com ([10.239.158.173]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2021 19:25:00 -0800 Date: Tue, 12 Jan 2021 11:28:22 +0800 From: Chen Yu To: Srinivas Pandruvada Cc: Len Brown , "Rafael J. Wysocki" , Viresh Kumar , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Zhang Rui , Wendy Wang Subject: Re: [PATCH 2/2][v2] cpufreq: intel_pstate: Get percpu max freq via HWP MSR register if available Message-ID: <20210112032822.GA28619@chenyu-office.sh.intel.com> References: <0ca097c7bbf58415b1df150ea50cb37579f8f8ab.1610338353.git.yu.c.chen@intel.com> <7a7de1fedb49489fddf7eac791149f546adccad1.camel@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7a7de1fedb49489fddf7eac791149f546adccad1.camel@linux.intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 11, 2021 at 03:11:02AM -0800, Srinivas Pandruvada wrote: > On Mon, 2021-01-11 at 15:43 +0800, Chen Yu wrote: > > Currently when turbo is disabled(either by BIOS or by the user), the > > intel_pstate > > driver reads the max frequency from the package-wide > > MSR_PLATFORM_INFO(0xce) register. > > However on asymmetric platforms it is possible in theory that small > > and big core with > > HWP enabled might have different max cpu frequency > max non-turbo frequency (although code call max_freq). > Okay, will change. Thanks, Chenyu > Thanks, > Srinivas >