From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16326C433E6 for ; Fri, 15 Jan 2021 09:11:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C6268233CF for ; Fri, 15 Jan 2021 09:11:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729925AbhAOJLf (ORCPT ); Fri, 15 Jan 2021 04:11:35 -0500 Received: from mga11.intel.com ([192.55.52.93]:49687 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725950AbhAOJLa (ORCPT ); Fri, 15 Jan 2021 04:11:30 -0500 IronPort-SDR: NhGmWwPySrQbnunATPmq4f4MyTVXJCB6Ur91Xhn7CLUzT/PBUFKWvmzKa/3fwCMigoEndZcYo9 8BvzVStC01VA== X-IronPort-AV: E=McAfee;i="6000,8403,9864"; a="175016673" X-IronPort-AV: E=Sophos;i="5.79,349,1602572400"; d="scan'208";a="175016673" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jan 2021 01:10:46 -0800 IronPort-SDR: hyqMqS9LAQ+GZ9lyH+qIC3M7r21DHMaIizgfY4hmQLs2p3gAHxdpca5L4ZWkfvIWkx/dbgW6IG VxbDoniilpcg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,349,1602572400"; d="scan'208";a="382597793" Received: from power-sh.sh.intel.com ([10.239.48.130]) by orsmga008.jf.intel.com with ESMTP; 15 Jan 2021 01:10:44 -0800 From: Zhang Rui To: peterz@infradead.org, mingo@redhat.com, acme@kernel.org Cc: mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@redhat.com, namhyung@kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, kan.liang@linux.intel.com, ak@linux.intel.com Subject: [PATCH 2/3] perf/x86/rapl: Fix energy counter detection Date: Fri, 15 Jan 2021 17:22:07 +0800 Message-Id: <20210115092208.20866-2-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210115092208.20866-1-rui.zhang@intel.com> References: <20210115092208.20866-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the RAPL ENERGY_COUNTER MSR, only the lower 32bits represent the energy counter, and the higher 32bits are reserved. Add the MSR mask for these MSRs to fix a problem that the RAPL PMU events are added erroneously when higher 32bits contain non-zero value. Signed-off-by: Zhang Rui Reviewed-by: Andi Kleen --- arch/x86/events/rapl.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index 7dbbeaacd995..7ed25b2ba05f 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -523,12 +523,15 @@ static bool test_msr(int idx, void *data) return test_bit(idx, (unsigned long *) data); } +/* Only lower 32bits of the MSR represents the energy counter */ +#define RAPL_MSR_MASK 0xFFFFFFFF + static struct perf_msr intel_rapl_msrs[] = { - [PERF_RAPL_PP0] = { MSR_PP0_ENERGY_STATUS, &rapl_events_cores_group, test_msr }, - [PERF_RAPL_PKG] = { MSR_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr }, - [PERF_RAPL_RAM] = { MSR_DRAM_ENERGY_STATUS, &rapl_events_ram_group, test_msr }, - [PERF_RAPL_PP1] = { MSR_PP1_ENERGY_STATUS, &rapl_events_gpu_group, test_msr }, - [PERF_RAPL_PSYS] = { MSR_PLATFORM_ENERGY_STATUS, &rapl_events_psys_group, test_msr }, + [PERF_RAPL_PP0] = { MSR_PP0_ENERGY_STATUS, &rapl_events_cores_group, test_msr, false, RAPL_MSR_MASK }, + [PERF_RAPL_PKG] = { MSR_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr, false, RAPL_MSR_MASK }, + [PERF_RAPL_RAM] = { MSR_DRAM_ENERGY_STATUS, &rapl_events_ram_group, test_msr, false, RAPL_MSR_MASK }, + [PERF_RAPL_PP1] = { MSR_PP1_ENERGY_STATUS, &rapl_events_gpu_group, test_msr, false, RAPL_MSR_MASK }, + [PERF_RAPL_PSYS] = { MSR_PLATFORM_ENERGY_STATUS, &rapl_events_psys_group, test_msr, false, RAPL_MSR_MASK }, }; /* -- 2.17.1