From: Grygorii Strashko <grygorii.strashko@ti.com>
To: "David S. Miller" <davem@davemloft.net>, <netdev@vger.kernel.org>,
Jakub Kicinski <kuba@kernel.org>,
Peter Ujfalusi <peter.ujfalusi@gmail.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Rob Herring <robh+dt@kernel.org>
Cc: <linux-kernel@vger.kernel.org>, Sekhar Nori <nsekhar@ti.com>,
<devicetree@vger.kernel.org>,
Grygorii Strashko <grygorii.strashko@ti.com>
Subject: [net-next 5/6] net: ti: cpsw_ale: add driver data for AM64 CPSW3g
Date: Fri, 15 Jan 2021 21:28:52 +0200 [thread overview]
Message-ID: <20210115192853.5469-6-grygorii.strashko@ti.com> (raw)
In-Reply-To: <20210115192853.5469-1-grygorii.strashko@ti.com>
From: Vignesh Raghavendra <vigneshr@ti.com>
The AM642x CPSW3g is similar to j721e-cpswxg except its ALE table size is
512 entries. Add entry for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
drivers/net/ethernet/ti/cpsw_ale.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c
index cdc308a2aa3e..d828f856237a 100644
--- a/drivers/net/ethernet/ti/cpsw_ale.c
+++ b/drivers/net/ethernet/ti/cpsw_ale.c
@@ -1256,6 +1256,13 @@ static const struct cpsw_ale_dev_id cpsw_ale_id_match[] = {
.major_ver_mask = 0x7,
.vlan_entry_tbl = vlan_entry_k3_cpswxg,
},
+ {
+ .dev_id = "am64-cpswxg",
+ .features = CPSW_ALE_F_STATUS_REG | CPSW_ALE_F_HW_AUTOAGING,
+ .major_ver_mask = 0x7,
+ .vlan_entry_tbl = vlan_entry_k3_cpswxg,
+ .tbl_entries = 512,
+ },
{ },
};
--
2.17.1
next prev parent reply other threads:[~2021-01-15 19:31 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-15 19:28 [net-next 0/6] net: ethernet: ti: am65-cpsw-nuss: introduce support for am64x cpsw3g Grygorii Strashko
2021-01-15 19:28 ` [net-next 1/6] dt-binding: ti: am65x-cpts: add assigned-clock and power-domains props Grygorii Strashko
2021-01-15 19:28 ` [net-next 2/6] dt-binding: net: ti: k3-am654-cpsw-nuss: update bindings for am64x cpsw3g Grygorii Strashko
2021-01-15 19:28 ` [net-next 3/6] net: ethernet: ti: am65-cpsw-nuss: Use DMA device for DMA API Grygorii Strashko
2021-01-15 19:28 ` [net-next 4/6] net: ethernet: ti: am65-cpsw-nuss: Support for transparent ASEL handling Grygorii Strashko
2021-01-15 19:28 ` Grygorii Strashko [this message]
2021-01-15 19:28 ` [net-next 6/6] net: ethernet: ti: am65-cpsw: add support for am64x cpsw3g Grygorii Strashko
2021-01-20 1:50 ` [net-next 0/6] net: ethernet: ti: am65-cpsw-nuss: introduce " patchwork-bot+netdevbpf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210115192853.5469-6-grygorii.strashko@ti.com \
--to=grygorii.strashko@ti.com \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=nsekhar@ti.com \
--cc=peter.ujfalusi@gmail.com \
--cc=robh+dt@kernel.org \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®