From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@siol.net>
Cc: "Icenowy Zheng" <icenowy@aosc.io>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Clément Péron" <peron.clem@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Shuosheng Huang" <huangshuosheng@allwinnertech.com>,
"Yangtao Li" <tiny.windzz@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
devicetree@vger.kernel.org
Subject: [PATCH v3 21/21] arm64: dts: allwinner: Add OrangePi Zero 2 .dts
Date: Mon, 18 Jan 2021 02:08:48 +0000 [thread overview]
Message-ID: <20210118020848.11721-22-andre.przywara@arm.com> (raw)
In-Reply-To: <20210118020848.11721-1-andre.przywara@arm.com>
The OrangePi Zero 2 is a development board with the new H616 SoC.
It features the usual connectors used on those small boards, and comes
with the AXP305, which seems to be compatible with the AXP805.
For more details see: http://linux-sunxi.org/Xunlong_Orange_Pi_Zero2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h616-orangepi-zero2.dts | 240 ++++++++++++++++++
2 files changed, 241 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 41ce680e5f8d..9ba4b5d92657 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -36,3 +36,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
new file mode 100644
index 000000000000..7f49d192fe41
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
@@ -0,0 +1,240 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2020 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "OrangePi Zero2";
+ compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
+
+ aliases {
+ ethernet0 = &emac0;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+ default-state = "on";
+ };
+
+ led-1 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+ };
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the USB-C socket */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <®_vcc5v>;
+ enable-active-high;
+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
+ status = "okay";
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+/* USB 2 & 3 are on headers only. */
+
+&emac0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <®_dcdce>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio0 {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <®_dcdce>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp305: pmic@745 {
+ compatible = "x-powers,axp305", "x-powers,axp805",
+ "x-powers,axp806";
+ reg = <0x745>;
+
+ x-powers,self-working-mode;
+ vina-supply = <®_vcc5v>;
+ vinb-supply = <®_vcc5v>;
+ vinc-supply = <®_vcc5v>;
+ vind-supply = <®_vcc5v>;
+ vine-supply = <®_vcc5v>;
+ aldoin-supply = <®_vcc5v>;
+ bldoin-supply = <®_vcc5v>;
+ cldoin-supply = <®_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-sys";
+ };
+
+ reg_aldo2: aldo2 { /* 3.3V on headers */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext";
+ };
+
+ reg_aldo3: aldo3 { /* 3.3V on headers */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext2";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8";
+ };
+
+ bldo2 {
+ /* unused */
+ };
+
+ bldo3 {
+ /* unused */
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ cldo1 {
+ /* reserved */
+ };
+
+ cldo2 {
+ /* unused */
+ };
+
+ cldo3 {
+ /* unused */
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd-dram";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-eth-mmc";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&usbotg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <®_usb1_vbus>;
+ status = "okay";
+};
--
2.17.5
prev parent reply other threads:[~2021-01-18 2:14 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-18 2:08 [PATCH v3 00/21] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara
2021-01-18 2:08 ` [PATCH v3 01/21] dt-bindings: mmc: sunxi: Add Allwinner A100 and H616 compatibles Andre Przywara
2021-01-18 2:08 ` [PATCH v3 02/21] mmc: sunxi: add support for A100 mmc controller Andre Przywara
2021-01-18 13:28 ` Maxime Ripard
2021-01-18 15:52 ` Andre Przywara
2021-01-18 15:55 ` [linux-sunxi] " Chen-Yu Tsai
2021-01-21 16:38 ` Maxime Ripard
2021-01-18 2:08 ` [PATCH v3 03/21] dt-bindings: pinctrl: Add Allwinner H616 compatible strings Andre Przywara
2021-01-18 13:29 ` Maxime Ripard
2021-01-21 21:12 ` Linus Walleij
2021-01-18 2:08 ` [PATCH v3 04/21] pinctrl: sunxi: Add support for the Allwinner H616 pin controller Andre Przywara
2021-01-18 15:26 ` Maxime Ripard
2021-01-21 21:14 ` Linus Walleij
2021-01-18 2:08 ` [PATCH v3 05/21] pinctrl: sunxi: Add support for the Allwinner H616-R " Andre Przywara
2021-01-21 21:16 ` Linus Walleij
2021-01-18 2:08 ` [PATCH v3 06/21] dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616 Andre Przywara
2021-01-18 15:26 ` Maxime Ripard
2021-01-18 2:08 ` [PATCH v3 07/21] clk: sunxi-ng: Add support for the Allwinner H616 R-CCU Andre Przywara
2021-01-18 15:30 ` Maxime Ripard
2021-01-18 2:08 ` [PATCH v3 08/21] clk: sunxi-ng: Add support for the Allwinner H616 CCU Andre Przywara
2021-01-18 15:30 ` Maxime Ripard
2021-01-18 2:08 ` [PATCH v3 09/21] mfd: axp20x: Allow AXP chips without interrupt lines Andre Przywara
2021-01-18 3:37 ` Samuel Holland
2021-01-21 15:54 ` Andre Przywara
2021-01-18 2:08 ` [PATCH v3 10/21] dt-bindings: sram: sunxi-sram: Add H616 compatible string Andre Przywara
2021-01-18 2:08 ` [PATCH v3 11/21] soc: sunxi: sram: Add support for more than one EMAC clock Andre Przywara
2021-01-18 2:08 ` [PATCH v3 12/21] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Andre Przywara
2021-01-18 21:27 ` Jakub Kicinski
2021-01-18 2:08 ` [PATCH v3 13/21] phy: sun4i-usb: Rework HCI PHY (aka. "pmu_unk1") handling Andre Przywara
2021-01-18 15:32 ` Maxime Ripard
2021-01-18 2:08 ` [PATCH v3 14/21] dt-bindings: usb: Add H616 compatible string Andre Przywara
2021-01-18 15:33 ` Maxime Ripard
2021-01-18 2:08 ` [PATCH v3 15/21] dt-bindings: usb: sunxi-musb: " Andre Przywara
2021-01-18 15:33 ` Maxime Ripard
2021-01-18 2:08 ` [PATCH v3 16/21] phy: sun4i-usb: Add support for the H616 USB PHY Andre Przywara
2021-01-18 15:33 ` Maxime Ripard
2021-01-18 2:08 ` [PATCH v3 17/21] dt-bindings: watchdog: sun4i: Add H616 compatible string Andre Przywara
2021-01-18 15:34 ` maxime
2021-01-23 17:31 ` Guenter Roeck
2021-01-18 2:08 ` [PATCH v3 18/21] dt-bindings: allwinner: Add H616 compatible strings Andre Przywara
2021-01-18 4:28 ` Samuel Holland
2021-01-25 11:59 ` Andre Przywara
2021-01-18 12:05 ` Mark Brown
2021-01-18 2:08 ` [PATCH v3 19/21] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara
2021-01-18 4:35 ` Samuel Holland
2021-01-18 2:08 ` [PATCH v3 20/21] dt-bindings: arm: sunxi: Add OrangePi Zero 2 binding Andre Przywara
2021-01-18 2:08 ` Andre Przywara [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210118020848.11721-22-andre.przywara@arm.com \
--to=andre.przywara@arm.com \
--cc=devicetree@vger.kernel.org \
--cc=huangshuosheng@allwinnertech.com \
--cc=icenowy@aosc.io \
--cc=jernej.skrabec@siol.net \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sunxi@googlegroups.com \
--cc=mripard@kernel.org \
--cc=peron.clem@gmail.com \
--cc=robh@kernel.org \
--cc=samuel@sholland.org \
--cc=tiny.windzz@gmail.com \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®