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From: Wei Huang <wei.huang2@amd.com>
To: kvm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, pbonzini@redhat.com,
	vkuznets@redhat.com, mlevitsk@redhat.com, seanjc@google.com,
	joro@8bytes.org, bp@alien8.de, tglx@linutronix.de,
	mingo@redhat.com, x86@kernel.org, jmattson@google.com,
	wanpengli@tencent.com, bsd@redhat.com, dgilbert@redhat.com,
	luto@amacapital.net, wei.huang2@amd.com
Subject: [PATCH v2 3/4] KVM: SVM: Add support for VMCB address check change
Date: Thu, 21 Jan 2021 01:55:07 -0500	[thread overview]
Message-ID: <20210121065508.1169585-4-wei.huang2@amd.com> (raw)
In-Reply-To: <20210121065508.1169585-1-wei.huang2@amd.com>

New AMD CPUs have a change that checks VMEXIT intercept on special SVM
instructions before checking their EAX against reserved memory region.
This change is indicated by CPUID_0x8000000A_EDX[28]. If it is 1, #VMEXIT
is triggered before #GP. KVM doesn't need to intercept and emulate #GP
faults as #GP is supposed to be triggered.

Co-developed-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Wei Huang <wei.huang2@amd.com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kvm/svm/svm.c             | 6 +++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 84b887825f12..ea89d6fdd79a 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -337,6 +337,7 @@
 #define X86_FEATURE_AVIC		(15*32+13) /* Virtual Interrupt Controller */
 #define X86_FEATURE_V_VMSAVE_VMLOAD	(15*32+15) /* Virtual VMSAVE VMLOAD */
 #define X86_FEATURE_VGIF		(15*32+16) /* Virtual GIF */
+#define X86_FEATURE_SVME_ADDR_CHK	(15*32+28) /* "" SVME addr check */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */
 #define X86_FEATURE_AVX512VBMI		(16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 6ed523cab068..2a12870ac71a 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -313,7 +313,8 @@ int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 	svm->vmcb->save.efer = efer | EFER_SVME;
 	vmcb_mark_dirty(svm->vmcb, VMCB_CR);
 	/* Enable #GP interception for SVM instructions */
-	set_exception_intercept(svm, GP_VECTOR);
+	if (!kvm_cpu_cap_has(X86_FEATURE_SVME_ADDR_CHK))
+		set_exception_intercept(svm, GP_VECTOR);
 
 	return 0;
 }
@@ -933,6 +934,9 @@ static __init void svm_set_cpu_caps(void)
 	    boot_cpu_has(X86_FEATURE_AMD_SSBD))
 		kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD);
 
+	if (boot_cpu_has(X86_FEATURE_SVME_ADDR_CHK))
+		kvm_cpu_cap_set(X86_FEATURE_SVME_ADDR_CHK);
+
 	/* Enable INVPCID feature */
 	kvm_cpu_cap_check_and_set(X86_FEATURE_INVPCID);
 }
-- 
2.27.0


  parent reply	other threads:[~2021-01-21  7:55 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-21  6:55 [PATCH v2 0/4] Handle #GP for SVM execution instructions Wei Huang
2021-01-21  6:55 ` [PATCH v2 1/4] KVM: x86: Factor out x86 instruction emulation with decoding Wei Huang
2021-01-21 14:04   ` Maxim Levitsky
2021-01-21 14:23     ` Paolo Bonzini
2021-01-21 15:31       ` Wei Huang
2021-01-21  6:55 ` [PATCH v2 2/4] KVM: SVM: Add emulation support for #GP triggered by SVM instructions Wei Huang
2021-01-21 14:07   ` Maxim Levitsky
2021-01-21 16:06     ` Wei Huang
2021-01-21 16:55       ` Maxim Levitsky
2021-01-21 22:40         ` Sean Christopherson
2021-01-25 13:22           ` Maxim Levitsky
2021-01-21  6:55 ` Wei Huang [this message]
2021-01-21 14:08   ` [PATCH v2 3/4] KVM: SVM: Add support for VMCB address check change Maxim Levitsky
2021-01-21  6:55 ` [PATCH v2 4/4] KVM: SVM: Support #GP handling for the case of nested on nested Wei Huang
2021-01-21 14:09   ` Maxim Levitsky
2021-01-21 14:25   ` Paolo Bonzini
2021-01-21 14:56   ` Dr. David Alan Gilbert
2021-01-21 15:10     ` Maxim Levitsky

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