From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 019AAC433E0 for ; Sat, 30 Jan 2021 09:26:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C4BD664E02 for ; Sat, 30 Jan 2021 09:26:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231696AbhA3J0O (ORCPT ); Sat, 30 Jan 2021 04:26:14 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:11645 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231775AbhA3JXB (ORCPT ); Sat, 30 Jan 2021 04:23:01 -0500 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4DSQSc3558z161cG; Sat, 30 Jan 2021 15:14:40 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.176.220) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.498.0; Sat, 30 Jan 2021 15:15:46 +0800 From: Zhen Lei To: Will Deacon , Robin Murphy , "Mark Rutland" , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , Jean-Philippe Brucker , Shameer Kolothum Subject: [PATCH v4 1/2] perf/smmuv3: Don't reserve the PMCG register spaces Date: Sat, 30 Jan 2021 15:14:13 +0800 Message-ID: <20210130071414.1575-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20210130071414.1575-1-thunder.leizhen@huawei.com> References: <20210130071414.1575-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.174.176.220] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According to the SMMUv3 specification: Each PMCG counter group is represented by one 4KB page (Page 0) with one optional additional 4KB page (Page 1), both of which are at IMPLEMENTATION DEFINED base addresses. This means that the PMCG register spaces may be within the 64KB pages of the SMMUv3 register space. When both the SMMU and PMCG drivers reserve their own resources, a resource conflict occurs. To avoid this conflict, don't reserve the PMCG regions. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index 74474bb322c3f26..5e894f957c7b935 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -793,17 +793,30 @@ static int smmu_pmu_probe(struct platform_device *pdev) .capabilities = PERF_PMU_CAP_NO_EXCLUDE, }; - smmu_pmu->reg_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res_0); - if (IS_ERR(smmu_pmu->reg_base)) - return PTR_ERR(smmu_pmu->reg_base); + /* + * The register spaces of the PMCG may be in the register space of + * other devices. For example, SMMU. Therefore, the PMCG resources are + * not reserved to avoid resource conflicts with other drivers. + */ + res_0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res_0) + return ERR_PTR(-EINVAL); + smmu_pmu->reg_base = devm_ioremap(dev, res_0->start, resource_size(res_0)); + if (!smmu_pmu->reg_base) + return ERR_PTR(-ENOMEM); cfgr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CFGR); /* Determine if page 1 is present */ if (cfgr & SMMU_PMCG_CFGR_RELOC_CTRS) { - smmu_pmu->reloc_base = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(smmu_pmu->reloc_base)) - return PTR_ERR(smmu_pmu->reloc_base); + struct resource *res_1; + + res_1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res_1) + return ERR_PTR(-EINVAL); + smmu_pmu->reloc_base = devm_ioremap(dev, res_1->start, resource_size(res_1)); + if (!smmu_pmu->reloc_base) + return ERR_PTR(-ENOMEM); } else { smmu_pmu->reloc_base = smmu_pmu->reg_base; } -- 1.8.3