From: Daniel Palmer <daniel@0x0f.com>
To: soc@kernel.org
Cc: arnd@kernel.org, olof@lixom.net, w@1wt.eu,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Daniel Palmer <daniel@0x0f.com>
Subject: [PATCH 3/3] ARM: mstar: Add mpll to base dtsi
Date: Mon, 1 Mar 2021 21:35:42 +0900 [thread overview]
Message-ID: <20210301123542.2800643-4-daniel@0x0f.com> (raw)
In-Reply-To: <20210301123542.2800643-1-daniel@0x0f.com>
All of the currently known MStar/SigmaStar ARMv7 SoCs have at least
one MPLL and it seems to always be at the same place so add it to
the base dtsi.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
arch/arm/boot/dts/mstar-v7.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 889c3804c251..075d583d6f40 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/mstar-msc313-mpll.h>
/ {
#address-cells = <1>;
@@ -124,6 +125,13 @@ l3bridge: l3bridge@204400 {
reg = <0x204400 0x200>;
};
+ mpll: mpll@206000 {
+ compatible = "mstar,msc313-mpll";
+ #clock-cells = <1>;
+ reg = <0x206000 0x200>;
+ clocks = <&xtal>;
+ };
+
gpio: gpio@207800 {
#gpio-cells = <2>;
reg = <0x207800 0x200>;
--
2.30.1
prev parent reply other threads:[~2021-03-01 12:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-01 12:35 [PATCH 0/3] ARM: mstar: MPLL mop up Daniel Palmer
2021-03-01 12:35 ` [PATCH 1/3] ARM: mstar: Select MSTAR_MSC313_MPLL Daniel Palmer
2021-03-01 12:35 ` [PATCH 2/3] ARM: mstar: Add the external clocks to the base dsti Daniel Palmer
2021-03-01 12:35 ` Daniel Palmer [this message]
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