From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7BA4C433E6 for ; Mon, 1 Mar 2021 14:08:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A1FE364DF2 for ; Mon, 1 Mar 2021 14:08:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235970AbhCAOIK (ORCPT ); Mon, 1 Mar 2021 09:08:10 -0500 Received: from mout01.posteo.de ([185.67.36.65]:56351 "EHLO mout01.posteo.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234389AbhCAOHO (ORCPT ); Mon, 1 Mar 2021 09:07:14 -0500 Received: from submission (posteo.de [89.146.220.130]) by mout01.posteo.de (Postfix) with ESMTPS id 298DD160061 for ; Mon, 1 Mar 2021 15:06:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=posteo.net; s=2017; t=1614607574; bh=P/n0/GTf5ttMdaVwkEGnOKWl5yd5jMp5SfQxZ+33fVw=; h=Date:From:To:Cc:Subject:From; b=VS496EfUUVKLLK/uAmbqb/CcCVOEyFGMJz/95UdloTNXe6dMly/I7Ujdji4jxkB+B kt367YYh/kTQyUOCCARO0CvFhqoxsSHJd81Jm0QgAhUWSDTM5GbQvnWFlh+IfypJaZ eDjgpFkP8xlj7T4Z0Yusq2cH8j/KGSTZCPwZ1cydqQmK6QJ4KXjwR4Y96ODxE3CjST yzrVSOR6HSVkQXO4Rs37psfj5gs6Zh/0T7COv0TdK6kCz6aEngx6sq6rBGGF3cWmrC 4zzdViO8H7YnJh+TFul5yc5c3i8/IdPrkcrEiuuGPR7QQ6cpBPLa6IgBv0aeq/LvSx gvmfwFR6Ylu8g== Received: from customer (localhost [127.0.0.1]) by submission (posteo.de) with ESMTPSA id 4Dq29c2jVlz6tmM; Mon, 1 Mar 2021 15:06:12 +0100 (CET) Date: Mon, 1 Mar 2021 15:06:08 +0100 From: Wilken Gottwalt To: Maxime Ripard Cc: linux-kernel@vger.kernel.org, Ohad Ben-Cohen , Bjorn Andersson , Baolin Wang , Rob Herring , Chen-Yu Tsai , Jernej Skrabec Subject: Re: [PATCH v6 2/2] hwspinlock: add sun6i hardware spinlock support Message-ID: <20210301150608.014b807b@monster.powergraphx.local> In-Reply-To: <20210301131305.wrsonoqwcm6ua2e2@hendrix> References: <20210301131305.wrsonoqwcm6ua2e2@hendrix> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 1 Mar 2021 14:13:05 +0100 Maxime Ripard wrote: > On Sat, Feb 27, 2021 at 02:03:54PM +0100, Wilken Gottwalt wrote: > > Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in > > most of the sun6i compatible SoCs. > > > > This unit provides at least 32 spinlocks in hardware. The implementation > > supports 32, 64, 128 or 256 32bit registers. A lock can be taken by > > reading a register and released by writing a 0 to it. This driver > > supports all 4 spinlock setups, but for now only the first setup (32 > > locks) seem to exist in available devices. This spinlock unit is shared > > between all ARM cores and the embedded companion core. All of them can > > take/release a lock with a single cycle operation. It can be used to > > sync access to devices shared by the ARM cores and the companion core. > > > > There are two ways to check if a lock is taken. The first way is to read > > a lock. If a 0 is returned, the lock was free and is taken now. If an 1 > > is returned, the caller has to try again. Which means the lock is taken. > > The second way is to read a 32bit wide status register where every bit > > represents one of the 32 first locks. According to the datasheets this > > status register supports only the 32 first locks. This is the reason the > > first way (lock read/write) approach is used to be able to cover all 256 > > locks in future devices. The driver also reports the amount of supported > > locks via debugfs. > > > > Signed-off-by: Wilken Gottwalt Nope, I had to replace the devm_hwspin_lock_register function by the hwspin_lock_register function because like Bjorn pointed out that it can fail and needs to handled correctly. And having a devm_* function does not play well with the non-devm clock/reset functions and winding back if an error occurs. It also messes with the call order in the remove function. So I went back to the classic way where I have full control over the call order. > Didn't I review this one already? > Maxime