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From: Michael Walle <michael@walle.cc>
To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Michael Walle <michael@walle.cc>
Subject: [PATCH v4 3/4] mtd: spi-nor: winbond: add OTP support to w25q32fw/jw
Date: Sat,  6 Mar 2021 01:05:34 +0100	[thread overview]
Message-ID: <20210306000535.9890-4-michael@walle.cc> (raw)
In-Reply-To: <20210306000535.9890-1-michael@walle.cc>

With all the helper functions in place, add OTP support for the Winbond
W25Q32JW and W25Q32FW.

Both were tested on a LS1028A SoC with a NXP FSPI controller.

Signed-off-by: Michael Walle <michael@walle.cc>
---
 drivers/mtd/spi-nor/winbond.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index e5dfa786f190..9a3f8ff007fd 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -55,14 +55,18 @@ static const struct flash_info winbond_parts[] = {
 	{ "w25q32", INFO(0xef4016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "w25q32dw", INFO(0xef6016, 0, 64 * 1024,  64,
 			   SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			   SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
+			   SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+			   OTP_INFO(256, 3, 0x1000, 0x1000)
+	},
+
 	{ "w25q32jv", INFO(0xef7016, 0, 64 * 1024,  64,
 			   SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			   SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
 	},
 	{ "w25q32jwm", INFO(0xef8016, 0, 64 * 1024,  64,
 			    SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			    SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
+			    SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+			    OTP_INFO(256, 3, 0x1000, 0x1000) },
 	{ "w25q64jwm", INFO(0xef8017, 0, 64 * 1024, 128,
 			    SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			    SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
@@ -131,9 +135,18 @@ static int winbond_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
 	return spi_nor_write_disable(nor);
 }
 
+static const struct spi_nor_otp_ops winbond_otp_ops = {
+	.read = spi_nor_otp_read_secr,
+	.write = spi_nor_otp_write_secr,
+	.lock = spi_nor_otp_lock_sr2,
+	.is_locked = spi_nor_otp_is_locked_sr2,
+};
+
 static void winbond_default_init(struct spi_nor *nor)
 {
 	nor->params->set_4byte_addr_mode = winbond_set_4byte_addr_mode;
+	if (nor->params->otp.org->n_regions)
+		nor->params->otp.ops = &winbond_otp_ops;
 }
 
 static const struct spi_nor_fixups winbond_fixups = {
-- 
2.20.1


  parent reply	other threads:[~2021-03-06  0:06 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-06  0:05 [PATCH v4 0/4] mtd: spi-nor: OTP support Michael Walle
2021-03-06  0:05 ` [PATCH v4 1/4] mtd: spi-nor: add " Michael Walle
2021-03-15  7:28   ` Tudor.Ambarus
2021-03-15  9:23     ` Michael Walle
2021-03-15  9:39       ` Tudor.Ambarus
2021-03-15  9:44         ` Tudor.Ambarus
2021-03-15 10:01           ` Michael Walle
2021-03-06  0:05 ` [PATCH v4 2/4] mtd: spi-nor: implement OTP support for Winbond and similar flashes Michael Walle
2021-03-15  8:20   ` Tudor.Ambarus
2021-03-15 10:29     ` Michael Walle
2021-03-15  8:31   ` Tudor.Ambarus
2021-03-15 10:43     ` Michael Walle
2021-03-06  0:05 ` Michael Walle [this message]
2021-03-15  8:26   ` [PATCH v4 3/4] mtd: spi-nor: winbond: add OTP support to w25q32fw/jw Tudor.Ambarus
2021-03-15  9:26     ` Michael Walle
2021-03-15  9:34       ` Tudor.Ambarus
2021-03-06  0:05 ` [PATCH v4 4/4] mtd: spi-nor: implement OTP erase for Winbond and similar flashes Michael Walle
2021-03-06  0:20   ` Michael Walle
2021-03-07  8:48   ` kernel test robot
2021-03-15  8:42   ` Tudor.Ambarus

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