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Sun, 7 Mar 2021 17:29:52 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Sun, 7 Mar 2021 17:29:52 +0000 Received: from ediswmail.ad.cirrus.com (ediswmail.ad.cirrus.com [198.61.86.93]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id D480B11CB; Sun, 7 Mar 2021 17:29:52 +0000 (UTC) Date: Sun, 7 Mar 2021 17:29:52 +0000 From: Charles Keepax To: Shengjiu Wang CC: , , , , , , , , , , Subject: Re: [PATCH] ASoC: wm8962: Relax bit clock divider searching Message-ID: <20210307172952.GG106851@ediswmail.ad.cirrus.com> References: <1614770488-12861-1-git-send-email-shengjiu.wang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <1614770488-12861-1-git-send-email-shengjiu.wang@nxp.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 clxscore=1015 adultscore=0 malwarescore=0 mlxlogscore=999 impostorscore=0 bulkscore=0 priorityscore=1501 mlxscore=0 spamscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103070096 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 03, 2021 at 07:21:28PM +0800, Shengjiu Wang wrote: > With S20_3LE format case, the sysclk = rate * 384, > the bclk = rate * 20 * 2, there is no proper bclk divider > for 384 / 40, because current condition needs exact match. > So driver fails to configure the clocking: > > wm8962 3-001a: Unsupported BCLK ratio 9 > > Fix this by relaxing bitclk divider searching, so that when > no exact value can be derived from sysclk pick the closest > value greater than expected bitclk. > > Signed-off-by: Shengjiu Wang > --- > sound/soc/codecs/wm8962.c | 21 +++++++++++---------- > 1 file changed, 11 insertions(+), 10 deletions(-) > > diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c > index ce4666a74793..f5cd22450190 100644 > --- a/sound/soc/codecs/wm8962.c > +++ b/sound/soc/codecs/wm8962.c > @@ -2403,6 +2403,7 @@ static const int sysclk_rates[] = { > static void wm8962_configure_bclk(struct snd_soc_component *component) > { > struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component); > + int best, min_diff, diff; > int dspclk, i; > int clocking2 = 0; > int clocking4 = 0; > @@ -2473,23 +2474,23 @@ static void wm8962_configure_bclk(struct snd_soc_component *component) > > dev_dbg(component->dev, "DSPCLK is %dHz, BCLK %d\n", dspclk, wm8962->bclk); > Very minor nit but it would probably be nice to have some equivalent debug statement that prints out the actual BCLK we end up with. There are a couple of statements printing the requested speed, but nothing that will output what the driver actually applies after this change. Otherwise I think the change looks good. Thanks, Charles