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From: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
To: <maz@kernel.org>, Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc: <daniel@thingy.jp>, <jason@lakedaemon.net>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>, <matthias.bgg@gmail.com>,
	<tglx@linutronix.de>, <yj.chiang@mediatek.com>
Subject: Re: [PATCH] irqchip/irq-mst: Support polarity configuration
Date: Mon, 8 Mar 2021 11:01:01 +0800	[thread overview]
Message-ID: <20210308030102.5161-1-mark-pk.tsai@mediatek.com> (raw)
In-Reply-To: <874khorux9.wl-maz@kernel.org>

From: Marc Zyngier <maz@kernel.org>

> > 
> > Support irq polarity configuration and save and restore the config
> > when system suspend and resume.
> > 
> > Signed-off-by: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
> > ---
> >  drivers/irqchip/irq-mst-intc.c | 87 ++++++++++++++++++++++++++++++++--
> >  1 file changed, 84 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/irqchip/irq-mst-intc.c b/drivers/irqchip/irq-mst-intc.c
> > index 143657b0cf28..979a4d55bcb1 100644
> > --- a/drivers/irqchip/irq-mst-intc.c
> > +++ b/drivers/irqchip/irq-mst-intc.c
> > @@ -13,15 +13,25 @@
> >  #include <linux/of_irq.h>
> >  #include <linux/slab.h>
> >  #include <linux/spinlock.h>
> > +#include <linux/syscore_ops.h>
> >  
> > -#define INTC_MASK	0x0
> > -#define INTC_EOI	0x20
> > +#define INTC_MASK		0x0
> > +#define INTC_REV_POLARITY	0x10
> > +#define INTC_EOI		0x20
> > +
> > +#ifdef CONFIG_PM_SLEEP
> > +static LIST_HEAD(mst_intc_list);
> > +#endif
> >  
> >  struct mst_intc_chip_data {
> >  	raw_spinlock_t	lock;
> >  	unsigned int	irq_start, nr_irqs;
> >  	void __iomem	*base;
> >  	bool		no_eoi;
> > +#ifdef CONFIG_PM_SLEEP
> > +	struct list_head entry;
> > +	u16 saved_polarity_conf[DIV_ROUND_UP(64, 16)];
> 
> Where is this 64 coming from?

The maximum number of interrupts a mst-intc supports is 64 in
Mstar and Mediatek SoCs now.
So I just use the maximum number of interrupts here.

> 
> > +#endif
> >  };
> >  
> >  static void mst_set_irq(struct irq_data *d, u32 offset)
> > @@ -78,6 +88,16 @@ static void mst_intc_eoi_irq(struct irq_data *d)
> >  	irq_chip_eoi_parent(d);
> >  }
> >  
> > +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type)
> > +{
> > +	if (type == IRQ_TYPE_LEVEL_LOW) {
> > +		mst_set_irq(data, INTC_REV_POLARITY);
> > +		type = IRQ_TYPE_LEVEL_HIGH;
> > +	}
> 
> If you are introducing a irq_set_type callback, you need to return an
> error for the settings you don't handle.

Got it, thanks for the comment.
I will add it in the next patch.

  reply	other threads:[~2021-03-08  3:02 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-05 12:09 Mark-PK Tsai
2021-03-06 17:06 ` Daniel Palmer
2021-03-06 18:28   ` Marc Zyngier
2021-03-08  2:42     ` Mark-PK Tsai (蔡沛剛)
2021-03-08 13:06       ` Daniel Palmer
2021-03-06 18:36 ` Marc Zyngier
2021-03-08  3:01   ` Mark-PK Tsai [this message]
2021-03-08  9:09     ` Marc Zyngier
2021-03-08 14:31       ` Mark-PK Tsai

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