From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3735CC43333 for ; Tue, 9 Mar 2021 22:43:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0FCD365020 for ; Tue, 9 Mar 2021 22:43:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232171AbhCIWmg (ORCPT ); Tue, 9 Mar 2021 17:42:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232109AbhCIWmY (ORCPT ); Tue, 9 Mar 2021 17:42:24 -0500 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA187C06174A for ; Tue, 9 Mar 2021 14:42:23 -0800 (PST) Received: by mail-yb1-xb49.google.com with SMTP id n10so18855411ybb.12 for ; Tue, 09 Mar 2021 14:42:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=reply-to:date:in-reply-to:message-id:mime-version:references :subject:from:to:cc; bh=ZCcijjOapg1QfLSW5pXm/pEGIGsY5zGSFUclPuMLRrU=; b=Ka6Q2KV9oKbUwNMAtkfqhzyygrpwjUKJVNSh9cGOTU+JKNsOmL2ijkXvlzh/7xllPH GT94sUKQ+TeH08Yu3/t61gUG3ysV/FHOjeXupzOwY386eJA7lYJbe8VBbwNndoojIr8O dQ5CP8HbuHA/+W96UJVeec3rFWquzFDD8WdggMb+tMzPgeP4nDC3avsqDx2Fuqw0xC12 tincV7nAebvFMSHX+3+QG6vCs5wzZybIliv2YggU/ECUPlz0iHtZ26OMv7DV3AFjUz5S dS0Vf3ufhu3U+9o3XD5Nr+ADZ5aj80sMJUSeQ0bEYrReuPTj5u/GIksGYi8iUvZ0oW/B 2Qjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:reply-to:date:in-reply-to:message-id :mime-version:references:subject:from:to:cc; bh=ZCcijjOapg1QfLSW5pXm/pEGIGsY5zGSFUclPuMLRrU=; b=VbsI1vYPpqC9ts38EAADDDzK7MAPxkf6tiBW01x2TxA5/DcJBXl7oUPbz8+tYtFVij G7F5sWV4ayQXLtYAZSwc9mTGZOG/xh8xesBJ67GxYAfXaDKkxCD3jcj5hQF/ZhqhBaKu SslFTikm3D7TLQZLhdSE3qFqWDm2GclLr9Dm/0xXRU/BI7WJ1PN6GAfu5Hihxa9/Um0H hPb5IeyCBKd8tglFXC++fIcFs+MxYfzeVY/j/71VQwLRl7XII4wehaqi9N/HqgsOwNVq CsWb/c08EpsHWt1Q9aAcgVTh9JJOxvXhRFdaYWLoAk/KZbfp+S7ohRzOdr2gI6uiVsN+ 3fxA== X-Gm-Message-State: AOAM533eEZMzhxMGQBIyMKcEm4OtGalSsPwAMvv/bV3wgatCIJFxX1qt Mik3F+jl3OUoLxpAa4aEpsmrS79DovM= X-Google-Smtp-Source: ABdhPJw7Ygss7b6NJViF19DgNNTwghaiMvMFHvfIkteutHyQ89ttNtYn5UuFtFI3UEt3A4eUl5v3SWkTzio= X-Received: from seanjc798194.pdx.corp.google.com ([2620:15c:f:10:e4dd:6c31:9463:f8da]) (user=seanjc job=sendgmr) by 2002:a25:c793:: with SMTP id w141mr91195ybe.29.1615329743155; Tue, 09 Mar 2021 14:42:23 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 9 Mar 2021 14:42:07 -0800 In-Reply-To: <20210309224207.1218275-1-seanjc@google.com> Message-Id: <20210309224207.1218275-5-seanjc@google.com> Mime-Version: 1.0 References: <20210309224207.1218275-1-seanjc@google.com> X-Mailer: git-send-email 2.30.1.766.gb4fecdf3b7-goog Subject: [PATCH v2 4/4] KVM: x86/mmu: Mark the PAE roots as decrypted for shadow paging From: Sean Christopherson To: Paolo Bonzini Cc: Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Lendacky , Maxim Levitsky , Brijesh Singh Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Set the PAE roots used as decrypted to play nice with SME when KVM is using shadow paging. Explicitly skip setting the C-bit when loading CR3 for PAE shadow paging, even though it's completely ignored by the CPU. The extra documentation is nice to have. Note, there are several subtleties at play with NPT. In addition to legacy shadow paging, the PAE roots are used for SVM's NPT when either KVM is 32-bit (uses PAE paging) or KVM is 64-bit and shadowing 32-bit NPT. However, 32-bit Linux, and thus KVM, doesn't support SME. And 64-bit KVM can happily set the C-bit in CR3. This also means that keeping __sme_set(root) for 32-bit KVM when NPT is enabled is conceptually wrong, but functionally ok since SME is 64-bit only. Leave it as is to avoid unnecessary pollution. Fixes: d0ec49d4de90 ("kvm/x86/svm: Support Secure Memory Encryption within KVM") Cc: stable@vger.kernel.org Cc: Brijesh Singh Cc: Tom Lendacky Signed-off-by: Sean Christopherson --- arch/x86/kvm/mmu/mmu.c | 22 +++++++++++++++++++++- arch/x86/kvm/svm/svm.c | 5 ++--- 2 files changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 6b0576ff2846..c6ed633594a2 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -48,6 +48,7 @@ #include #include #include +#include #include #include #include "trace.h" @@ -3388,7 +3389,10 @@ static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu) if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->lm_root)) return -EIO; - /* Unlike 32-bit NPT, the PDP table doesn't need to be in low mem. */ + /* + * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and + * doesn't need to be decrypted. + */ pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); if (!pae_root) return -ENOMEM; @@ -5274,6 +5278,8 @@ slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot, static void free_mmu_pages(struct kvm_mmu *mmu) { + if (!tdp_enabled && mmu->pae_root) + set_memory_encrypted((unsigned long)mmu->pae_root, 1); free_page((unsigned long)mmu->pae_root); free_page((unsigned long)mmu->lm_root); } @@ -5308,6 +5314,20 @@ static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) return -ENOMEM; mmu->pae_root = page_address(page); + + /* + * CR3 is only 32 bits when PAE paging is used, thus it's impossible to + * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so + * that KVM's writes and the CPU's reads get along. Note, this is + * only necessary when using shadow paging, as 64-bit NPT can get at + * the C-bit even when shadowing 32-bit NPT, and SME isn't supported + * by 32-bit kernels (when KVM itself uses 32-bit NPT). + */ + if (!tdp_enabled) + set_memory_decrypted((unsigned long)mmu->pae_root, 1); + else + WARN_ON_ONCE(shadow_me_mask); + for (i = 0; i < 4; ++i) mmu->pae_root[i] = INVALID_PAE_ROOT; diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 58f4dc0e7864..271196400495 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -3907,9 +3907,8 @@ static void svm_load_mmu_pgd(struct kvm_vcpu *vcpu, hpa_t root_hpa, struct vcpu_svm *svm = to_svm(vcpu); unsigned long cr3; - root_hpa = __sme_set(root_hpa); if (npt_enabled) { - svm->vmcb->control.nested_cr3 = root_hpa; + svm->vmcb->control.nested_cr3 = __sme_set(root_hpa); vmcb_mark_dirty(svm->vmcb, VMCB_NPT); /* Loading L2's CR3 is handled by enter_svm_guest_mode. */ @@ -3917,7 +3916,7 @@ static void svm_load_mmu_pgd(struct kvm_vcpu *vcpu, hpa_t root_hpa, return; cr3 = vcpu->arch.cr3; } else if (vcpu->arch.mmu->shadow_root_level >= PT64_ROOT_4LEVEL) { - cr3 = root_hpa | kvm_get_active_pcid(vcpu); + cr3 = __sme_set(root_hpa) | kvm_get_active_pcid(vcpu); } else { /* PCID in the guest should be impossible with a 32-bit MMU. */ WARN_ON_ONCE(kvm_get_active_pcid(vcpu)); -- 2.30.1.766.gb4fecdf3b7-goog