From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
To: Sean Wang <sean.wang@mediatek.com>,
Landen Chao <Landen.Chao@mediatek.com>,
Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Russell King <linux@armlinux.org.uk>,
netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Subject: [PATCH net-next,v2 3/3] net: dsa: mt7530: disable TRGMII clock at reconfigure
Date: Wed, 10 Mar 2021 18:09:54 -0800 [thread overview]
Message-ID: <20210311020954.842341-3-ilya.lipnitskiy@gmail.com> (raw)
In-Reply-To: <20210311020954.842341-1-ilya.lipnitskiy@gmail.com>
Disable both core and TRGMII Tx clocks prior to reconfiguring.
Previously, only the core clock was disabled, but not TRGMII Tx clock.
So disable both, then configure them, then re-enable both, for
consistency.
Reword the comment about core_write_mmd_indirect for clarity.
Tested on Ubiquiti ER-X running the GMAC and MT7530 in TRGMII mode.
Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
---
drivers/net/dsa/mt7530.c | 19 +++++++++++--------
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 80a35caf920e..7ef5e7c23e05 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -435,15 +435,18 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface)
mt7530_write(priv, MT7530_TRGMII_TD_ODT(i),
TD_DM_DRVP(8) | TD_DM_DRVN(8));
- /* Setup core clock for MT7530 */
- /* Disable MT7530 core clock */
- core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
-
- /* Disable PLL, since phy_device has not yet been created
- * provided for phy_[read,write]_mmd_indirect is called, we
- * provide our own core_write_mmd_indirect to complete this
- * function.
+ /* Since phy_device has not yet been created and
+ * phy_[read,write]_mmd_indirect is not available, we provide our own
+ * core_write_mmd_indirect with core_{clear,write,set} wrappers to
+ * complete this function.
*/
+
+ /* Disable MT7530 core and TRGMII Tx clocks */
+ core_clear(priv, CORE_TRGMII_GSW_CLK_CG,
+ REG_GSWCK_EN | REG_TRGMIICK_EN);
+
+ /* Setup core clock for MT7530 */
+ /* Disable PLL */
core_write(priv, CORE_GSWPLL_GRP1, 0);
/* Set core clock into 500Mhz */
--
2.30.2
next prev parent reply other threads:[~2021-03-11 2:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-11 2:09 [PATCH net-next,v2 1/3] net: dsa: mt7530: setup core clock even in TRGMII mode Ilya Lipnitskiy
2021-03-11 2:09 ` [PATCH net-next,v2 2/3] net: dsa: mt7530: clean up redundant clock enables Ilya Lipnitskiy
2021-03-11 2:09 ` Ilya Lipnitskiy [this message]
2021-03-11 17:41 ` [PATCH net-next,v2 1/3] net: dsa: mt7530: setup core clock even in TRGMII mode Andrew Lunn
2021-03-24 1:33 ` Ilya Lipnitskiy
2021-03-24 1:34 ` Ilya Lipnitskiy
2021-03-11 17:43 ` Andrew Lunn
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