From: Peter Zijlstra <peterz@infradead.org>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: "Liang, Kan" <kan.liang@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
"mingo@kernel.org" <mingo@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"acme@kernel.org" <acme@kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"bp@alien8.de" <bp@alien8.de>,
"namhyung@kernel.org" <namhyung@kernel.org>,
"jolsa@redhat.com" <jolsa@redhat.com>,
"yao.jin@linux.intel.com" <yao.jin@linux.intel.com>,
"alexander.shishkin@linux.intel.com"
<alexander.shishkin@linux.intel.com>,
"Hunter, Adrian" <adrian.hunter@intel.com>,
Mark Rutland <mark.rutland@arm.com>,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Subject: Re: [PATCH V2 20/25] perf/x86/intel: Add Alder Lake Hybrid support
Date: Thu, 11 Mar 2021 22:43:15 +0100 [thread overview]
Message-ID: <20210311214315.GN4746@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <a606211b5b454ef5b658858e0cb361f0@intel.com>
On Thu, Mar 11, 2021 at 09:09:57PM +0000, Luck, Tony wrote:
> >> I think the "sapphire_rapids" is the code name for the server platform.
> >
> > If that's really the case, then:
> >
> > #define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F
> >
> > is wrong, those things should be uarch name, not platform name. Tony?
>
> 0x8F is the model number of the CPU that is named Sapphire Rapids that
> goes into the Eagle Stream platform
>
> If you want a uarch name, that might be the name of the core
> (.... something-cove ... I can't keep track of the names of all the
> coves).
uarch names used to be different from that. But looking at wikipedia,
things have gone completely apeshit after skylake :-/
We used to have one microarch and then a laptop,desktop and server sku,
but now each of those has a separately named microarch, so where we had
one new name each year, we now have at least 3. No wonder I've no
sodding clue anymore.
/me stmps off to get a beer to forget all I've seen ...
next prev parent reply other threads:[~2021-03-11 21:44 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-10 16:37 [PATCH V2 00/25] Add Alder Lake support for perf (kernel) kan.liang
2021-03-10 16:37 ` [PATCH V2 1/25] x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit kan.liang
2021-03-10 16:53 ` Borislav Petkov
2021-03-10 19:33 ` Srinivas Pandruvada
2021-03-10 19:46 ` Ricardo Neri
2021-03-10 20:01 ` Borislav Petkov
2021-03-10 22:25 ` Ricardo Neri
2021-03-10 22:32 ` Liang, Kan
2021-03-10 22:42 ` Srinivas Pandruvada
2021-03-10 16:37 ` [PATCH V2 2/25] x86/cpu: Add helper functions to get parameters of hybrid CPUs kan.liang
2021-03-11 11:48 ` Borislav Petkov
2021-03-10 16:37 ` [PATCH V2 03/25] perf/x86: Track pmu in per-CPU cpu_hw_events kan.liang
2021-03-10 16:37 ` [PATCH V2 04/25] perf/x86/intel: Hybrid PMU support for perf capabilities kan.liang
2021-03-10 16:37 ` [PATCH V2 05/25] perf/x86: Hybrid PMU support for intel_ctrl kan.liang
2021-03-10 16:37 ` [PATCH V2 06/25] perf/x86: Hybrid PMU support for counters kan.liang
2021-03-10 16:37 ` [PATCH V2 07/25] perf/x86: Hybrid PMU support for unconstrained kan.liang
2021-03-10 16:37 ` [PATCH V2 08/25] perf/x86: Hybrid PMU support for hardware cache event kan.liang
2021-03-11 11:07 ` Peter Zijlstra
2021-03-11 15:09 ` Liang, Kan
2021-03-10 16:37 ` [PATCH V2 09/25] perf/x86: Hybrid PMU support for event constraints kan.liang
2021-03-10 16:37 ` [PATCH V2 10/25] perf/x86: Hybrid PMU support for extra_regs kan.liang
2021-03-10 16:37 ` [PATCH V2 11/25] perf/x86/intel: Factor out intel_pmu_check_num_counters kan.liang
2021-03-10 16:37 ` [PATCH V2 12/25] perf/x86/intel: Factor out intel_pmu_check_event_constraints kan.liang
2021-03-10 16:37 ` [PATCH V2 13/25] perf/x86/intel: Factor out intel_pmu_check_extra_regs kan.liang
2021-03-10 16:37 ` [PATCH V2 14/25] perf/x86: Remove temporary pmu assignment in event_init kan.liang
2021-03-10 16:37 ` [PATCH V2 15/25] perf/x86: Factor out x86_pmu_show_pmu_cap kan.liang
2021-03-10 16:37 ` [PATCH V2 16/25] perf/x86: Register hybrid PMUs kan.liang
2021-03-10 16:50 ` Dave Hansen
2021-03-10 17:38 ` Liang, Kan
2021-03-11 11:56 ` Peter Zijlstra
2021-03-11 12:17 ` Peter Zijlstra
2021-03-11 12:30 ` Peter Zijlstra
2021-03-11 12:19 ` Peter Zijlstra
2021-03-11 12:34 ` Peter Zijlstra
2021-03-11 15:41 ` Liang, Kan
2021-03-11 16:13 ` Peter Zijlstra
2021-03-11 17:53 ` Andi Kleen
2021-03-11 19:54 ` Peter Zijlstra
2021-03-10 16:37 ` [PATCH V2 17/25] perf/x86: Add structures for the attributes of Hybrid PMUs kan.liang
2021-03-10 16:37 ` [PATCH V2 18/25] perf/x86/intel: Add attr_update for " kan.liang
2021-03-10 16:37 ` [PATCH V2 19/25] perf/x86: Support filter_match callback kan.liang
2021-03-10 16:37 ` [PATCH V2 20/25] perf/x86/intel: Add Alder Lake Hybrid support kan.liang
2021-03-11 12:51 ` Peter Zijlstra
2021-03-11 16:09 ` Peter Zijlstra
2021-03-11 16:32 ` Peter Zijlstra
2021-03-11 17:31 ` Liang, Kan
2021-03-11 16:53 ` Liang, Kan
2021-03-11 17:25 ` Liang, Kan
2021-03-11 19:58 ` Peter Zijlstra
2021-03-11 20:30 ` Andi Kleen
2021-03-11 20:37 ` Peter Zijlstra
2021-03-11 20:32 ` Liang, Kan
2021-03-11 20:47 ` Peter Zijlstra
2021-03-11 21:09 ` Luck, Tony
2021-03-11 21:43 ` Peter Zijlstra [this message]
2021-03-12 0:00 ` Andi Kleen
2021-03-10 16:37 ` [PATCH V2 21/25] perf: Introduce PERF_TYPE_HARDWARE_PMU and PERF_TYPE_HW_CACHE_PMU kan.liang
2021-03-10 16:37 ` [PATCH V2 22/25] perf/x86/intel/uncore: Add Alder Lake support kan.liang
2021-03-10 16:37 ` [PATCH V2 23/25] perf/x86/msr: Add Alder Lake CPU support kan.liang
2021-03-10 16:38 ` [PATCH V2 24/25] perf/x86/cstate: " kan.liang
2021-03-10 16:38 ` [PATCH V2 25/25] perf/x86/rapl: Add support for Intel Alder Lake kan.liang
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