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Fri, 12 Mar 2021 12:44:55 -0600 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Fri, 12 Mar 2021 18:44:53 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Fri, 12 Mar 2021 18:44:53 +0000 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.45]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id EC83211CF; Fri, 12 Mar 2021 18:44:52 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai CC: , , , Stefan Binding Subject: [PATCH 1/4] ALSA: hda/cirrus: Add error handling into CS8409 I2C functions Date: Fri, 12 Mar 2021 18:44:49 +0000 Message-ID: <20210312184452.3288-2-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210312184452.3288-1-vitalyr@opensource.cirrus.com> References: <20210312184452.3288-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 lowpriorityscore=0 suspectscore=0 phishscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 adultscore=0 spamscore=0 mlxlogscore=999 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103120135 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stefan Binding Tested on DELL Inspiron-3505, DELL Inspiron-3501, DELL Inspiron-3500 Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- sound/pci/hda/patch_cirrus.c | 95 +++++++++++++++++++++--------------- 1 file changed, 56 insertions(+), 39 deletions(-) diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c index 6a9e5c803977..ca8b522b1d6d 100644 --- a/sound/pci/hda/patch_cirrus.c +++ b/sound/pci/hda/patch_cirrus.c @@ -1508,7 +1508,7 @@ static void cs8409_enable_i2c_clock(struct hda_codec *codec, unsigned int flag) static int cs8409_i2c_wait_complete(struct hda_codec *codec) { int repeat = 5; - unsigned int retval = 0; + unsigned int retval; do { retval = cs_vendor_coef_get(codec, CIR_I2C_STATUS); @@ -1520,78 +1520,82 @@ static int cs8409_i2c_wait_complete(struct hda_codec *codec) } while (repeat); - return repeat > 0 ? 0 : -1; + return !!repeat; } -/* CS8409 slave i2cRead */ -static unsigned int cs8409_i2c_read(struct hda_codec *codec, +/* CS8409 slave i2cRead. + * Returns negative on error, otherwise returns read value in bits 0-7. + */ +static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, unsigned int i2c_reg, unsigned int paged) { unsigned int i2c_reg_data; - unsigned int retval = 0; + unsigned int read_data; cs8409_enable_i2c_clock(codec, 1); cs_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address); if (paged) { cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8); - if (cs8409_i2c_wait_complete(codec) == -1) { + if (!cs8409_i2c_wait_complete(codec)) { codec_err(codec, - "%s() Paged Transaction Failed 0x%02x : 0x%04x = 0x%02x\n", - __func__, i2c_address, i2c_reg, retval); + "%s() Paged Transaction Failed 0x%02x : 0x%04x\n", + __func__, i2c_address, i2c_reg); + return -EIO; } } i2c_reg_data = (i2c_reg << 8) & 0x0ffff; cs_vendor_coef_set(codec, CIR_I2C_QREAD, i2c_reg_data); - if (cs8409_i2c_wait_complete(codec) == -1) { - codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x = 0x%02x\n", - __func__, i2c_address, i2c_reg, retval); + if (!cs8409_i2c_wait_complete(codec)) { + codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n", + __func__, i2c_address, i2c_reg); + return -EIO; } /* Register in bits 15-8 and the data in 7-0 */ - retval = cs_vendor_coef_get(codec, CIR_I2C_QREAD); - retval &= 0x0ff; + read_data = cs_vendor_coef_get(codec, CIR_I2C_QREAD); cs8409_enable_i2c_clock(codec, 0); - return retval; + return read_data & 0x0ff; } /* CS8409 slave i2cWrite */ -static unsigned int cs8409_i2c_write(struct hda_codec *codec, +static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, unsigned int i2c_reg, unsigned int i2c_data, unsigned int paged) { - unsigned int retval = 0; - unsigned int i2c_reg_data = 0; + unsigned int i2c_reg_data; cs8409_enable_i2c_clock(codec, 1); cs_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address); if (paged) { cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8); - if (cs8409_i2c_wait_complete(codec) == -1) { + if (!cs8409_i2c_wait_complete(codec)) { codec_err(codec, - "%s() Paged Transaction Failed 0x%02x : 0x%04x = 0x%02x\n", - __func__, i2c_address, i2c_reg, retval); + "%s() Paged Transaction Failed 0x%02x : 0x%04x\n", + __func__, i2c_address, i2c_reg); + return -EIO; } } i2c_reg_data = ((i2c_reg << 8) & 0x0ff00) | (i2c_data & 0x0ff); cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg_data); - if (cs8409_i2c_wait_complete(codec) == -1) { - codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x = 0x%02x\n", - __func__, i2c_address, i2c_reg, retval); + if (!cs8409_i2c_wait_complete(codec)) { + codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n", + __func__, i2c_address, i2c_reg); + return -EIO; } cs8409_enable_i2c_clock(codec, 0); - return retval; + return 0; } static int cs8409_cs42l42_volume_info(struct snd_kcontrol *kcontrol, @@ -1624,14 +1628,27 @@ static int cs8409_cs42l42_volume_info(struct snd_kcontrol *kcontrol, static void cs8409_cs42l42_update_volume(struct hda_codec *codec) { struct cs_spec *spec = codec->spec; + int data; mutex_lock(&spec->cs8409_i2c_mux); - spec->cs42l42_hp_volume[0] = -(cs8409_i2c_read(codec, CS42L42_I2C_ADDR, - CS8409_CS42L42_REG_HS_VOLUME_CHA, 1)); - spec->cs42l42_hp_volume[1] = -(cs8409_i2c_read(codec, CS42L42_I2C_ADDR, - CS8409_CS42L42_REG_HS_VOLUME_CHB, 1)); - spec->cs42l42_hs_mic_volume[0] = -(cs8409_i2c_read(codec, CS42L42_I2C_ADDR, - CS8409_CS42L42_REG_AMIC_VOLUME, 1)); + data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, + CS8409_CS42L42_REG_HS_VOLUME_CHA, 1); + if (data >= 0) + spec->cs42l42_hp_volume[0] = -data; + else + spec->cs42l42_hp_volume[0] = CS8409_CS42L42_HP_VOL_REAL_MIN; + data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, + CS8409_CS42L42_REG_HS_VOLUME_CHB, 1); + if (data >= 0) + spec->cs42l42_hp_volume[1] = -data; + else + spec->cs42l42_hp_volume[1] = CS8409_CS42L42_HP_VOL_REAL_MIN; + data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, + CS8409_CS42L42_REG_AMIC_VOLUME, 1); + if (data >= 0) + spec->cs42l42_hs_mic_volume[0] = -data; + else + spec->cs42l42_hs_mic_volume[0] = CS8409_CS42L42_AMIC_VOL_REAL_MIN; mutex_unlock(&spec->cs8409_i2c_mux); spec->cs42l42_volume_init = 1; } @@ -1782,7 +1799,7 @@ static void cs8409_cs42l42_reset(struct hda_codec *codec) } /* Configure CS42L42 slave codec for jack autodetect */ -static int cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec) +static void cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec) { struct cs_spec *spec = codec->spec; @@ -1804,8 +1821,6 @@ static int cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec) cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b79, 0x00, 1); mutex_unlock(&spec->cs8409_i2c_mux); - - return 0; } /* Enable and run CS42L42 slave codec jack auto detect */ @@ -1860,9 +1875,9 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) { struct cs_spec *spec = codec->spec; int status_changed = 0; - unsigned int reg_cdc_status = 0; - unsigned int reg_hs_status = 0; - unsigned int reg_ts_status = 0; + int reg_cdc_status; + int reg_hs_status; + int reg_ts_status; int type = 0; struct hda_jack_tbl *jk; @@ -1881,13 +1896,15 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) reg_hs_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1124, 1); reg_ts_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1); - /* Clear interrupts */ + /* Clear interrupts, by reading interrupt status registers */ cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b7b, 1); - cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308, 1); - cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1); mutex_unlock(&spec->cs8409_i2c_mux); + /* If status values are < 0, read error has occurred. */ + if ((reg_cdc_status < 0) || (reg_hs_status < 0) || (reg_ts_status < 0)) + return; + /* HSDET_AUTO_DONE */ if (reg_cdc_status & CS42L42_HSDET_AUTO_DONE) { -- 2.25.1