From: Steen Hegelund <steen.hegelund@microchip.com>
To: Philipp Zabel <p.zabel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>
Cc: Steen Hegelund <steen.hegelund@microchip.com>,
Andrew Lunn <andrew@lunn.ch>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Gregory Clement <gregory.clement@bootlin.com>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>
Subject: [PATCH v8 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings
Date: Tue, 16 Mar 2021 10:08:37 +0100 [thread overview]
Message-ID: <20210316090839.3207930-2-steen.hegelund@microchip.com> (raw)
In-Reply-To: <20210316090839.3207930-1-steen.hegelund@microchip.com>
Document the Sparx5 reset device driver bindings
The driver uses a syscon and an IO range on sparx5 for access to
the reset control and the reset status.
Sparx5 will no longer use the existing Ocelot chip reset driver, but use
this new switch reset driver as it has the reset controller interface that
allows the first client to perform the reset on behalf of all the Sparx5
component drivers.
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
---
.../bindings/reset/microchip,rst.yaml | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml
diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
new file mode 100644
index 000000000000..370579aeeca1
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip Sparx5 Switch Reset Controller
+
+maintainers:
+ - Steen Hegelund <steen.hegelund@microchip.com>
+ - Lars Povlsen <lars.povlsen@microchip.com>
+
+description: |
+ The Microchip Sparx5 Switch provides reset control and implements the following
+ functions
+ - One Time Switch Core Reset (Soft Reset)
+
+properties:
+ $nodename:
+ pattern: "^reset-controller@[0-9a-f]+$"
+
+ compatible:
+ const: microchip,sparx5-switch-reset
+
+ reg:
+ items:
+ - description: global control block registers
+
+ reg-names:
+ items:
+ - const: gcb
+
+ "#reset-cells":
+ const: 1
+
+ cpu-syscon:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: syscon used to access CPU reset
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - "#reset-cells"
+ - cpu-syscon
+
+additionalProperties: false
+
+examples:
+ - |
+ reset: reset-controller@11010008 {
+ compatible = "microchip,sparx5-switch-reset";
+ reg = <0x11010008 0x4>;
+ reg-names = "gcb";
+ #reset-cells = <1>;
+ cpu-syscon = <&cpu_ctrl>;
+ };
+
--
2.30.2
next prev parent reply other threads:[~2021-03-16 9:11 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-16 9:08 [PATCH v8 0/3] Adding the Sparx5 Switch Reset Driver Steen Hegelund
2021-03-16 9:08 ` Steen Hegelund [this message]
2021-03-23 22:07 ` [PATCH v8 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings Rob Herring
2021-03-16 9:08 ` [PATCH v8 2/3] reset: mchp: sparx5: add switch reset driver Steen Hegelund
2021-03-16 9:08 ` [PATCH v8 3/3] arm64: dts: reset: add microchip sparx5 " Steen Hegelund
2021-03-29 11:26 ` [PATCH v8 0/3] Adding the Sparx5 Switch Reset Driver Steen Hegelund
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