From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A44CC433F4 for ; Sun, 21 Mar 2021 08:35:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6EABD61946 for ; Sun, 21 Mar 2021 08:35:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230137AbhCUIcj (ORCPT ); Sun, 21 Mar 2021 04:32:39 -0400 Received: from smtp-17.italiaonline.it ([213.209.10.17]:56561 "EHLO libero.it" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230112AbhCUIcW (ORCPT ); Sun, 21 Mar 2021 04:32:22 -0400 Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([87.20.116.197]) by smtp-17.iol.local with ESMTPA id NtVMlAZljtpGHNtVUlqmO0; Sun, 21 Mar 2021 09:32:21 +0100 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1616315541; bh=zVkuQ2oGVldVrVFvB2CtFewtN+s31qqxbZSXdfUASHo=; h=From; b=epsGvrqty3s6iFfes2spvJSYvC7S/QX9vSanM/ueqgb91eqsI3bglYSMZhREP0j4Y Wk1eLwF1NbgZyzQAer4inFW7Jrh9sfDhGOZeVXvc5Bs3idT45Us2BjEPd7pCecy4HI y+gFG1wk9PsMsijRKr080oJddayveH6VB9BWQjtFfxW+2ZeiyIU9Zi/rpiYtLa4azI 95oHmZPtkxm3zxwSixJNXpwNOUWtahVTrPCeXlXp+YoelxYpBCC5VldvTZ+a+eqmVh VkFaeqZchwEf4/E+0FlWrxbfpioWyPd4XgVSsjMhxgNey6prbdT3envruUlzz52mEB 0keUqygT+rqCQ== X-CNFS-Analysis: v=2.4 cv=Q7IXX66a c=1 sm=1 tr=0 ts=60570495 cx=a_exe a=AVqmXbCQpuNSdJmApS5GbQ==:117 a=AVqmXbCQpuNSdJmApS5GbQ==:17 a=1RDr0-BV0bhq8KCB1kIA:9 From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Dario Binacchi , Daniel Vetter , David Airlie , Jyri Sarha , Tomi Valkeinen , dri-devel@lists.freedesktop.org Subject: [PATCH v2 3/3] drm/tilcdc: fix pixel clock setting warning message Date: Sun, 21 Mar 2021 09:31:53 +0100 Message-Id: <20210321083153.2810-4-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210321083153.2810-1-dariobin@libero.it> References: <20210321083153.2810-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfDfpQSq7LzLNjIKjRNpVkFUqvjQm8/IVFQmhMqy2ynSc8QsfkjfF2nqwWdIFB3L0yfo9Rzyps2fqvsxnn+mAU8JHdnKfvY3Kt0gTRdl5vF6fMK1Gwt+3 JPOH5Sxi/oPF59IyD+mw6UA+sSIHmN52JOQDWl1GPJ0bKlv5mtyHw0JCcDkyzWoT057xrVfzThytZYwDmKIimPoaLYGmzf9l7h1dGZgJ0yKgbLr2W5NE7Hen c/U8znWRWyATFFNV/XbkVSS0HMrmm2tJ2i8wRzFhBai4/xHXXOTlKkALIPaNOYVCgjuHvJBKuJdMvKPytAjnJWjqGzO0VoZu32M8gvR0w0qGEu/eBhiKcSli l5O+EXUfU7pQj24oxDR9+zO2v2pzP5j/lXOw6NIzajJrCv4Md1MogOKhbjqfZaTJxnuCKuBd Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The warning message did not printed the LCD pixel clock rate but the LCD clock divisor input rate. As a consequence, the required and real pixel clock rates are now passed to the tilcdc_pclk_diff(). Signed-off-by: Dario Binacchi --- Changes in v2: - The patch has been added in version 2. drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index ac6228cb04d9..c0792c52dc02 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -203,7 +203,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - unsigned long clk_rate, real_rate, real_pclk_rate, pclk_rate; + unsigned long clk_rate, real_pclk_rate, pclk_rate; unsigned int clkdiv; int ret; @@ -239,12 +239,12 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) * 5% is an arbitrary value - LCDs are usually quite tolerant * about pixel clock rates. */ - real_rate = clkdiv * pclk_rate; + real_pclk_rate = clk_rate / clkdiv; - if (tilcdc_pclk_diff(clk_rate, real_rate) > 5) { + if (tilcdc_pclk_diff(pclk_rate, real_pclk_rate) > 5) { dev_warn(dev->dev, "effective pixel clock rate (%luHz) differs from the calculated rate (%luHz)\n", - clk_rate, real_rate); + pclk_rate, real_pclk_rate); } } -- 2.17.1