From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0A16C43445 for ; Thu, 25 Mar 2021 06:56:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C5D1E61A24 for ; Thu, 25 Mar 2021 06:56:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229995AbhCYGzs (ORCPT ); Thu, 25 Mar 2021 02:55:48 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:40938 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229662AbhCYGzW (ORCPT ); Thu, 25 Mar 2021 02:55:22 -0400 X-UUID: f42441fe8ace4c998fc4fc3e9b96e585-20210325 X-UUID: f42441fe8ace4c998fc4fc3e9b96e585-20210325 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1805030963; Thu, 25 Mar 2021 14:55:09 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 25 Mar 2021 14:55:08 +0800 Received: from mtkslt301.mediatek.inc (10.21.14.114) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 25 Mar 2021 14:55:08 +0800 From: Chunfeng Yun To: Vinod Koul , Matthias Brugger CC: Chunfeng Yun , Kishon Vijay Abraham I , Rob Herring , Chun-Kuang Hu , Philipp Zabel , Cawa Cheng , CK Hu , Daniel Kurtz , Jie Qiu , , , , Subject: [PATCH RESEND v5 03/12] dt-bindings: phy: mediatek: tphy: change patternProperties Date: Thu, 25 Mar 2021 14:54:49 +0800 Message-ID: <20210325065458.43363-3-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210325065458.43363-1-chunfeng.yun@mediatek.com> References: <20210325065458.43363-1-chunfeng.yun@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The phy may be named as pcie-phy when the T-PHY only supports PCIe mode, it's also the similar case for SATA, named as sata-phy. Reviewed-by: Rob Herring Signed-off-by: Chunfeng Yun --- v5: no changes v4: add reviewed-by Rob v2~v3: no changes --- Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index 602e6ff45785..4f1733fd9a55 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -117,7 +117,7 @@ properties: # Required child node: patternProperties: - "^usb-phy@[0-9a-f]+$": + "^(usb|pcie|sata)-phy@[0-9a-f]+$": type: object description: A sub-node is required for each port the controller provides. -- 2.18.0