From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4904C433B4 for ; Sat, 10 Apr 2021 14:49:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 99FA8610A2 for ; Sat, 10 Apr 2021 14:49:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234802AbhDJOtS (ORCPT ); Sat, 10 Apr 2021 10:49:18 -0400 Received: from mga17.intel.com ([192.55.52.151]:36795 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234587AbhDJOtP (ORCPT ); Sat, 10 Apr 2021 10:49:15 -0400 IronPort-SDR: txoN0MZeBNvbdzUPHbs85EEhmoMIhhe0u7Lzk0AwvaY4yBtfESebctKDozUTnk1MAv3POGkkVB rWRxcEFhSQCQ== X-IronPort-AV: E=McAfee;i="6000,8403,9950"; a="174023976" X-IronPort-AV: E=Sophos;i="5.82,212,1613462400"; d="scan'208";a="174023976" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Apr 2021 07:49:00 -0700 IronPort-SDR: 4LLPejWhnujnYJd2Rv5aRHA5Bqo3JakHoF2v4TBaDPM6OdktWh91cNGqStVb+jUJaQ1frdpTaD uu40+wdc70pQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,212,1613462400"; d="scan'208";a="416687791" Received: from shbuild999.sh.intel.com (HELO localhost) ([10.239.147.94]) by fmsmga008.fm.intel.com with ESMTP; 10 Apr 2021 07:48:57 -0700 Date: Sat, 10 Apr 2021 22:48:56 +0800 From: Feng Tang To: Borislav Petkov Cc: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Peter Zijlstra , x86@kernel.org, linux-kernel@vger.kernel.org, rui.zhang@intel.com, andi.kleen@intel.com, dave.hansen@intel.com, len.brown@intel.com Subject: Re: [RFC 1/2] x86/tsc: add a timer to make sure tsc_adjust is always checked Message-ID: <20210410144856.GC22054@shbuild999.sh.intel.com> References: <1617092747-15769-1-git-send-email-feng.tang@intel.com> <87y2dq32xc.ffs@nanos.tec.linutronix.de> <20210410094752.GB21691@zn.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210410094752.GB21691@zn.tnic> User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Boris, On Sat, Apr 10, 2021 at 11:47:52AM +0200, Borislav Petkov wrote: > On Sat, Apr 10, 2021 at 11:27:11AM +0200, Thomas Gleixner wrote: > > On Tue, Mar 30 2021 at 16:25, Feng Tang wrote: > > > Normally the tsc_sync will be checked every time system enters idle state, > > > but there is still caveat that a system won't enter idle, either because > > > it's too busy or configured purposely to not enter idle. Setup a periodic > > > timer to make sure the check is always on. > > > > Bah. I really hate the fact that we don't have a knob to disable writes > > to the TSC/TSC_ADJUST msrs. That would spare this business alltogether. > > We have the MSR filtering and I'd *love* to add those MSRs to a > permanent ban list of MSRs which will never ever be written to from > luserspace. Yep, I just tried changing TSC_ADJUST msr with 'wrmsr' command, and it did succeed and trigger the warning of tsc_verify_tsc_adjust(): [ 1135.387866] [Firmware Bug]: TSC ADJUST differs: CPU0 0 --> 4096. Restoring And the bigger risk is still BIOS's writing to TSC_ADJUST MSR beneath kernel. Thanks, Feng > -- > Regards/Gruss, > Boris. > > https://people.kernel.org/tglx/notes-about-netiquette