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From: Shanker Donthineni <sdonthineni@nvidia.com>
To: Alex Williamson <alex.williamson@redhat.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, Sinan Kaya <okaya@kernel.org>,
	Vikram Sethi <vsethi@nvidia.com>,
	Amey Narkhede <ameynarkhede03@gmail.com>,
	"Shanker Donthineni" <sdonthineni@nvidia.com>
Subject: [PATCH v5 2/2] PCI: Enable NO_BUS_RESET quirk for Nvidia GPUs
Date: Fri, 30 Apr 2021 18:26:24 -0500	[thread overview]
Message-ID: <20210430232624.25153-2-sdonthineni@nvidia.com> (raw)
In-Reply-To: <20210430232624.25153-1-sdonthineni@nvidia.com>

On select platforms, some Nvidia GPU devices do not work with SBR.
Triggering SBR would leave the device inoperable for the current
system boot. It requires a system hard-reboot to get the GPU device
back to normal operating condition post-SBR. For the affected
devices, enable NO_BUS_RESET quirk to fix the issue.

This issue will be fixed in the next generation of hardware.

Signed-off-by: Shanker Donthineni <sdonthineni@nvidia.com>
---
Changes since v4:
 - Move reset quirk next to the existing no_bus reset quirks
Changes since v1:
 - Split patch into 2, code for handling _RST and SBR specific quirk
 - The RST based reset is called as a first-class mechanism in the reset code path

 drivers/pci/quirks.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 8f47d139c381..ceec67342365 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3558,6 +3558,18 @@ static void quirk_no_bus_reset(struct pci_dev *dev)
 	dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET;
 }
 
+/*
+ * Some Nvidia GPU devices do not work with bus reset, SBR needs to be
+ * prevented for those affected devices.
+ */
+static void quirk_nvidia_no_bus_reset(struct pci_dev *dev)
+{
+	if ((dev->device & 0xffc0) == 0x2340)
+		quirk_no_bus_reset(dev);
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
+			 quirk_nvidia_no_bus_reset);
+
 /*
  * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset.
  * The device will throw a Link Down error on AER-capable systems and
-- 
2.17.1


  reply	other threads:[~2021-04-30 23:26 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-30 23:26 [PATCH v5 1/2] PCI: Add support for a function level reset based on _RST method Shanker Donthineni
2021-04-30 23:26 ` Shanker Donthineni [this message]
2021-05-03  2:22   ` [PATCH v5 2/2] PCI: Enable NO_BUS_RESET quirk for Nvidia GPUs Sinan Kaya
2021-05-03  2:22 ` [PATCH v5 1/2] PCI: Add support for a function level reset based on _RST method Sinan Kaya

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