From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2008FC433B4 for ; Mon, 3 May 2021 01:44:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 03DE361264 for ; Mon, 3 May 2021 01:44:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232837AbhECBpG (ORCPT ); Sun, 2 May 2021 21:45:06 -0400 Received: from twspam01.aspeedtech.com ([211.20.114.71]:29509 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230368AbhECBpG (ORCPT ); Sun, 2 May 2021 21:45:06 -0400 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 1431WWK8085735; Mon, 3 May 2021 09:32:33 +0800 (GMT-8) (envelope-from steven_lee@aspeedtech.com) Received: from localhost.localdomain (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 3 May 2021 09:44:09 +0800 From: Steven Lee To: Adrian Hunter , Andrew Jeffery , Ulf Hansson , Joel Stanley , "Philipp Zabel" , "moderated list:ASPEED SD/MMC DRIVER" , "moderated list:ASPEED SD/MMC DRIVER" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list CC: , , Subject: [PATCH v2 3/3] mmc: sdhci-of-aspeed: Sync capabilities from device tree to ast2600 SoC registers Date: Mon, 3 May 2021 09:43:36 +0800 Message-ID: <20210503014336.20256-4-steven_lee@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210503014336.20256-1-steven_lee@aspeedtech.com> References: <20210503014336.20256-1-steven_lee@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 1431WWK8085735 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Sync Capbility Registers(SDIO140, SDIO144, SDIO240, SDIO244) of ast2600 SoC from the device tree. The bit 26(Voltage Support 1.8v) of SDIO140/SDIO240 is set to 1 if "mmc-hs200-1_8v" or "sd-uhs-sdr104" is added in the device tree. The bit 1(SDR104 Supported) of SDR144/SDR244 is set to 1 if "sd-uhs-sdr104" is added in the device tree. "timing-phase" is synced to SDIO0F4(Colock Phase Control) Signed-off-by: Steven Lee --- drivers/mmc/host/sdhci-of-aspeed.c | 107 ++++++++++++++++++++++++++--- 1 file changed, 98 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c index 7d8692e90996..2d755bac777a 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "sdhci-pltfm.h" @@ -30,10 +31,18 @@ #define ASPEED_SDC_S0_PHASE_IN_EN BIT(2) #define ASPEED_SDC_S0_PHASE_OUT_EN GENMASK(1, 0) #define ASPEED_SDC_PHASE_MAX 31 +#define ASPEED_SDC_CAP1_1_8V BIT(26) +#define ASPEED_SDC_CAP2_SDR104 BIT(1) +#define PROBE_AFTER_ASSET_DEASSERT 0x1 + +struct aspeed_sdc_info { + u32 flag; +}; struct aspeed_sdc { struct clk *clk; struct resource *res; + struct reset_control *rst; spinlock_t lock; void __iomem *regs; @@ -72,6 +81,44 @@ struct aspeed_sdhci { const struct aspeed_sdhci_phase_desc *phase_desc; }; +struct aspeed_sdc_info ast2600_sdc_info = { + .flag = PROBE_AFTER_ASSET_DEASSERT +}; + +/* + * The function sets the mirror register for updating + * capbilities of the current slot. + * + * slot | cap_idx | caps_reg | mirror_reg + * -----|---------|----------|------------ + * 0 | 0 | SDIO140 | SDIO10 + * 0 | 1 | SDIO144 | SDIO14 + * 1 | 0 | SDIO240 | SDIO20 + * 1 | 1 | SDIO244 | SDIO24 + */ +static void aspeed_sdc_set_slot_capability(struct sdhci_host *host, + struct aspeed_sdc *sdc, + u32 reg_val, + u8 slot, + u8 cap_idx) +{ + u8 caps_reg_offset; + u32 caps_reg; + u32 mirror_reg_offset; + u32 caps_val; + + if (cap_idx > 1 || slot > 1) + return; + + caps_reg_offset = (cap_idx == 0) ? 0 : 4; + caps_reg = 0x40 + caps_reg_offset; + caps_val = sdhci_readl(host, caps_reg); + caps_val |= reg_val; + mirror_reg_offset = (slot == 0) ? 0x10 : 0x20; + mirror_reg_offset += caps_reg_offset; + writel(caps_val, sdc->regs + mirror_reg_offset); +} + static void aspeed_sdc_configure_8bit_mode(struct aspeed_sdc *sdc, struct aspeed_sdhci *sdhci, bool bus8) @@ -329,9 +376,11 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) { const struct aspeed_sdhci_pdata *aspeed_pdata; struct sdhci_pltfm_host *pltfm_host; + struct device_node *np = pdev->dev.of_node; struct aspeed_sdhci *dev; struct sdhci_host *host; struct resource *res; + u32 reg_val; int slot; int ret; @@ -372,6 +421,21 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) sdhci_get_of_property(pdev); + if (of_property_read_bool(np, "mmc-hs200-1_8v") || + of_property_read_bool(np, "sd-uhs-sdr104")) + aspeed_sdc_set_slot_capability(host, + dev->parent, + ASPEED_SDC_CAP1_1_8V, + slot, + 0); + + if (of_property_read_bool(np, "sd-uhs-sdr104")) + aspeed_sdc_set_slot_capability(host, + dev->parent, + ASPEED_SDC_CAP2_SDR104, + slot, + 1); + pltfm_host->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(pltfm_host->clk)) return PTR_ERR(pltfm_host->clk); @@ -476,12 +540,25 @@ static struct platform_driver aspeed_sdhci_driver = { .remove = aspeed_sdhci_remove, }; +static const struct of_device_id aspeed_sdc_of_match[] = { + { .compatible = "aspeed,ast2400-sd-controller", }, + { .compatible = "aspeed,ast2500-sd-controller", }, + { .compatible = "aspeed,ast2600-sd-controller", .data = &ast2600_sdc_info}, + { } +}; + +MODULE_DEVICE_TABLE(of, aspeed_sdc_of_match); + static int aspeed_sdc_probe(struct platform_device *pdev) { struct device_node *parent, *child; struct aspeed_sdc *sdc; + const struct of_device_id *match = NULL; + const struct aspeed_sdc_info *info = NULL; + int ret; + u32 timing_phase; sdc = devm_kzalloc(&pdev->dev, sizeof(*sdc), GFP_KERNEL); if (!sdc) @@ -489,6 +566,23 @@ static int aspeed_sdc_probe(struct platform_device *pdev) spin_lock_init(&sdc->lock); + match = of_match_device(aspeed_sdc_of_match, &pdev->dev); + if (!match) + return -ENODEV; + + if (match->data) + info = match->data; + + if (info) { + if (info->flag & PROBE_AFTER_ASSET_DEASSERT) { + sdc->rst = devm_reset_control_get(&pdev->dev, NULL); + if (!IS_ERR(sdc->rst)) { + reset_control_assert(sdc->rst); + reset_control_deassert(sdc->rst); + } + } + } + sdc->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(sdc->clk)) return PTR_ERR(sdc->clk); @@ -506,6 +600,10 @@ static int aspeed_sdc_probe(struct platform_device *pdev) goto err_clk; } + if (!of_property_read_u32(pdev->dev.of_node, + "timing-phase", &timing_phase)) + writel(timing_phase, sdc->regs + ASPEED_SDC_PHASE); + dev_set_drvdata(&pdev->dev, sdc); parent = pdev->dev.of_node; @@ -536,15 +634,6 @@ static int aspeed_sdc_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id aspeed_sdc_of_match[] = { - { .compatible = "aspeed,ast2400-sd-controller", }, - { .compatible = "aspeed,ast2500-sd-controller", }, - { .compatible = "aspeed,ast2600-sd-controller", }, - { } -}; - -MODULE_DEVICE_TABLE(of, aspeed_sdc_of_match); - static struct platform_driver aspeed_sdc_driver = { .driver = { .name = "sd-controller-aspeed", -- 2.17.1