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[80.7.220.175]) by smtp.gmail.com with ESMTPSA id e38sm7979662wmp.21.2021.05.13.04.07.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 May 2021 04:07:19 -0700 (PDT) Date: Thu, 13 May 2021 12:07:17 +0100 From: Daniel Thompson To: Ard Biesheuvel Cc: Arnd Bergmann , Russell King , Arnd Bergmann , "# 3.4.x" , Marek Vasut , Nathan Chancellor , Nick Desaulniers , Linus Walleij , Nicolas Pitre , Geert Uytterhoeven , Mike Rapoport , Linux ARM , Linux Kernel Mailing List , clang-built-linux Subject: Re: [PATCH] ARM: fix gcc-10 thumb2-kernel regression Message-ID: <20210513110717.s2gr4l5upqzjkb5a@maple.lan> References: <20210512081211.200025-1-arnd@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 12, 2021 at 02:38:36PM +0200, Ard Biesheuvel wrote: > On Wed, 12 May 2021 at 10:13, Arnd Bergmann wrote: > > > > From: Arnd Bergmann > > > > When building the kernel wtih gcc-10 or higher using the > > CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y flag, the compiler picks a slightly > > different set of registers for the inline assembly in cpu_init() that > > subsequently results in a corrupt kernel stack as well as remaining in > > FIQ mode. If a banked register is used for the last argument, the wrong > > version of that register gets loaded into CPSR_c. When building in Arm > > mode, the arguments are passed as immediate values and the bug cannot > > happen. > > > > This got introduced when Daniel reworked the FIQ handling and was > > technically always broken, but happened to work with both clang and gcc > > before gcc-10 as long as they picked one of the lower registers. > > This is probably an indication that still very few people build the > > kernel in Thumb2 mode. > > > > Marek pointed out the problem on IRC, Arnd narrowed it down to this > > inline assembly and Russell pinpointed the exact bug. > > > > Change the constraints to force the final mode switch to use a non-banked > > register for the argument to ensure that the correct constant gets loaded. > > Another alternative would be to always use registers for the constant > > arguments to avoid the #ifdef that has now become more complex. > > > > Cc: # v3.18+ > > Cc: Daniel Thompson > > Reported-by: Marek Vasut > > Fixes: c0e7f7ee717e ("ARM: 8150/3: fiq: Replace default FIQ handler") > > Signed-off-by: Arnd Bergmann > > Nice bug! Indeed. Many thanks for those involved with the find and fix! Daniel.