From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2F39C47088 for ; Mon, 24 May 2021 15:20:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BEC8761415 for ; Mon, 24 May 2021 15:20:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234045AbhEXPWX (ORCPT ); Mon, 24 May 2021 11:22:23 -0400 Received: from mail.kernel.org ([198.145.29.99]:40896 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234810AbhEXPJK (ORCPT ); Mon, 24 May 2021 11:09:10 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 4FF876140C; Mon, 24 May 2021 14:51:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1621867908; bh=eThF42QgHM2ceyuUbfHXSeQsf1W1pocY7rix57lF/sE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OdIbysC08iRa3cyF3V8/KBFwdnZblNBZIdI7evc1HuVqB6RFigJQTAYIKoVfVdNUx sHBB+nxMCx4cV8NipJlu6lXD9HqPYOna4wezJsqtM/Qgq/00jB6smLQ6/e5Zu2kHda ELxWtEOfTrRlBvMwG6h+0R1+Qse0SzDcRRDgMnEGQfXA4ye3OL8jFlI9mBmJGTG1oW dlk6C3I9ncgJt5RUVg/rkFheOprDxTJ03OEPHSnzO8sRntJTejgXXUvRmyvXttU0sZ hJNBrVIegsKue8o4a4M9k0S3VyPnfBFhuO9PlENm0kVK/RgzKTYY6ea4kuAxuM1un6 fGjktaSWviJVg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Peter Zijlstra , Stafford Horne , Sasha Levin , openrisc@lists.librecores.org Subject: [PATCH AUTOSEL 4.4 14/16] openrisc: Define memory barrier mb Date: Mon, 24 May 2021 10:51:28 -0400 Message-Id: <20210524145130.2499829-14-sashal@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210524145130.2499829-1-sashal@kernel.org> References: <20210524145130.2499829-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peter Zijlstra [ Upstream commit 8b549c18ae81dbc36fb11e4aa08b8378c599ca95 ] This came up in the discussion of the requirements of qspinlock on an architecture. OpenRISC uses qspinlock, but it was noticed that the memmory barrier was not defined. Peter defined it in the mail thread writing: As near as I can tell this should do. The arch spec only lists this one instruction and the text makes it sound like a completion barrier. This is correct so applying this patch. Signed-off-by: Peter Zijlstra [shorne@gmail.com:Turned the mail into a patch] Signed-off-by: Stafford Horne Signed-off-by: Sasha Levin --- arch/openrisc/include/asm/barrier.h | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 arch/openrisc/include/asm/barrier.h diff --git a/arch/openrisc/include/asm/barrier.h b/arch/openrisc/include/asm/barrier.h new file mode 100644 index 000000000000..7538294721be --- /dev/null +++ b/arch/openrisc/include/asm/barrier.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_BARRIER_H +#define __ASM_BARRIER_H + +#define mb() asm volatile ("l.msync" ::: "memory") + +#include + +#endif /* __ASM_BARRIER_H */ -- 2.30.2