From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7261FC07E94 for ; Fri, 4 Jun 2021 10:03:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4CBA061400 for ; Fri, 4 Jun 2021 10:03:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229999AbhFDKEv (ORCPT ); Fri, 4 Jun 2021 06:04:51 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:47283 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230051AbhFDKEu (ORCPT ); Fri, 4 Jun 2021 06:04:50 -0400 Received: from mwalle01.fritz.box (ip4d17858c.dynamic.kabel-deutschland.de [77.23.133.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 801D422236; Fri, 4 Jun 2021 12:02:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1622800982; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=+grMGDMGZ79scJrCW3uqGV/ZG1Sr0b0POF0whRXi/0E=; b=YkoS4E3hcQgBAn5a/mktyvGPADJSTSVchzxyJZfh8bNNDFAQ7T/VMxKYUceA2/AljLeNhx 7X5aHyiStXx/lIgWfUU101l6er09rYp3sGiqgKDgrnuol9J6/cHABiBRPQiGV2aH2FjdWV w5oGNR0GQDxjCx9hpRyGsgn2dP3F3Uw= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Michael Walle , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Subject: [PATCH v5 0/5] mtd: spi-nor: otp: 4 byte mode fix and erase support Date: Fri, 4 Jun 2021 12:02:47 +0200 Message-Id: <20210604100252.9975-1-michael@walle.cc> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series is the follow up on the single patch mtd: spi-nor: implement OTP erase for Winbond and similar flashes Pratyush Yadav discovered a likely problem with bigger flashes, the address to access the security registers is either 3 or 4 byte (at least for winbond flashes). Changes since v4: - add new patch to get rid taking the spi lock if length is zero. Please note, that I didn't squash this into the "Fixes:" patch because it is unrelated to the actual bug. - add comment which explains that we could also branch on an error in spi_nor_mtd_otp_range_is_locked() - check zero length in spi_nor_mtd_otp_erase() and return early before taking the lock Changes since v3: - new patch to check for read-only OTP regions before writing - clarify term "security register" - don't combine lock and erase functions anymore. there are now more difference than similarities. Changes since v2: - fix 3/4 byte mode access - use spi_nor_erase_sector() by swapping the nor->erase_opcode - use more consistent wording regarding the security registers Changes since v1: - fixed kernel doc Michael Walle (5): mtd: spi-nor: otp: fix access to security registers in 4 byte mode mtd: spi-nor: otp: use more consistent wording mtd: spi-nor: otp: return -EROFS if region is read-only mtd: spi-nor: otp: simplify length check mtd: spi-nor: otp: implement erase for Winbond and similar flashes drivers/mtd/spi-nor/core.c | 2 +- drivers/mtd/spi-nor/core.h | 4 + drivers/mtd/spi-nor/otp.c | 156 +++++++++++++++++++++++++++++++--- drivers/mtd/spi-nor/winbond.c | 1 + 4 files changed, 149 insertions(+), 14 deletions(-) -- 2.20.1