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[44.242.66.180]) by smtp.gmail.com with ESMTPSA id ot30sm810474ejb.61.2021.06.15.23.02.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 23:02:33 -0700 (PDT) From: Bin Meng To: Palmer Dabbelt , Paul Walmsley , Atish Patra , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Bin Meng Subject: [PATCH 1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes Date: Wed, 16 Jun 2021 14:02:50 +0800 Message-Id: <20210616060251.398444-1-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bin Meng The "clock-frequency" property of cpu nodes isn't required. Drop it. Signed-off-by: Bin Meng --- arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index b9819570a7d1..ee54878b3f89 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -17,7 +17,6 @@ cpus { #size-cells = <0>; cpu@0 { - clock-frequency = <0>; compatible = "sifive,e51", "sifive,rocket0", "riscv"; device_type = "cpu"; i-cache-block-size = <64>; @@ -35,7 +34,6 @@ cpu0_intc: interrupt-controller { }; cpu@1 { - clock-frequency = <0>; compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; @@ -62,7 +60,6 @@ cpu1_intc: interrupt-controller { }; cpu@2 { - clock-frequency = <0>; compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; @@ -89,7 +86,6 @@ cpu2_intc: interrupt-controller { }; cpu@3 { - clock-frequency = <0>; compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; @@ -116,7 +112,6 @@ cpu3_intc: interrupt-controller { }; cpu@4 { - clock-frequency = <0>; compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; -- 2.25.1